IP Library Granted Patent US 7,502,874
Granted Patent B2
US 7,502,874 · App. 11/562,228 · Granted Mar 10, 2009

Methods and systems for integrating unique information in SAS interface components

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,502,874
App. No.
11/562,228
Granted
Mar 10, 2009
Kind
B2
Abstract

Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.

Claims (50)

1. A method for embedding information in a SAS component, the method comprising:

generating a memory image useful for a plurality of SAS components;

customizing the memory image for a particular SAS component to generate a customized memory image that is unique to the particular SAS component;

programming a programmable memory device with the customized memory image to generate a customized programmable memory device; and

using the programmable memory device in the particular SAS component,

wherein the step of programming is operable without operating the particular SAS component.

2. The method of claim 1

wherein the step of programming further comprises:

programming the programmable memory device physically external to the particular SAS component.

3. The method of claim 1

wherein the step of programming further comprises:

programming the programmable memory device while the programmable memory device is physically integrated into the particular SAS component but without operating the particular SAS component to perform the programming step.

4. The method of claim 1

wherein the step of customizing further comprises:

adding a supplied SAS address to the memory image to generate the customized memory image.

5. The method of claim 1

wherein the step of customizing further comprises:

adding a supplied board trace number to the memory image to generate the customized memory image.

6. The method of claim 1

wherein the step of customizing further comprises:

adding a supplied configuration page to the memory image to generate the customized memory image.

7. The method of claim 1

wherein the step of customizing further comprises:

adding a supplied boot record to the memory image to generate the customized memory image.

8. A method for manufacturing a plurality of SAS host bus adapters, the method comprising:

generating a plurality of customized memory images to be programmed into a corresponding plurality of memory component wherein each customized memory image includes information common to all of said plurality of SAS host bus adapters and wherein each customized memory image further includes customized information unique to a corresponding one of said plurality of SAS host bus adapters;

programming the plurality of customized memory images into the corresponding plurality of memory components wherein the step of programming is performed by a manufacturer of memory circuits;

receiving a plurality of customized memory components from the manufacturer of memory circuits; and

integrating each of the plurality of customized memory components with a corresponding SAS host bus adapter without requiring further programming of any unique information in the SAS host bus adapters.

9. The method of claim 8

wherein the step of generating further comprises:

using a computer program to generate each customized memory image from a common memory image and from supplied unique information corresponding to each customized memory image.

10. The method of claim 9

wherein the step of using is performed by the manufacturer of memory circuits.

11. The method of claim 9

wherein the step of using is performed by the manufacturer of the SAS host bus adapters, and

wherein the method further comprises:

providing the plurality of customized memory images to the manufacturer of memory components prior the step of programming.

12. The method of claim 8

wherein the step of generating further comprises:

adding unique information comprising a supplied SAS address for a particular host bus adapter to an un-customized memory image file to generate the customized memory image file corresponding to the particular host bus adapter.

13. The method of claim 8

wherein the step of generating further comprises:

adding unique information comprising a supplied board trace number for a particular host bus adapter to an un-customized memory image file to generate the customized memory image file corresponding to the particular host bus adapter.

14. The method of claim 8

wherein the step of generating further comprises:

adding unique information comprising a supplied configuration page for a particular host bus adapter to an un-customized memory image file to generate the customized memory image file corresponding to the particular host bus adapter.

15. The method of claim 8

wherein the step of generating further comprises:

adding unique information comprising a supplied boot record for a particular host bus adapter to an un-customized memory image file to generate the customized memory image file corresponding to the particular host bus adapter.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2006
From: FAULHABER, STEVEN F.; SINYKIN, JOSHUA P.; FREEL, MATTHEW K.
To: LSI LOGIC CORP.
Reel/Frame 018561/0058 →