Field-effect device for the detection of small quantities of electric charge, such as those generated in bio-molecular process, bound in the vicinity of the surface
View Patent ↗The device ( 1 ) allows the detection of small quantities of electrical charge (Qs) utilised for recognition of the gybridisation process of a single strand of DNA. It comprises a chip ( 2 ) in which is integrated an MOS device having a floating gate ( 7 ) a first portion ( 7 a) of which extends in facing relation to a recess ( 8 ) formed in a surface of the chip ( 2 ) and accessible from outside the chip ( 2 ) and operable to retain an electrical charge (Qs) to be measured bound to it. A second portion ( 7 b) of the gate ( 7 ) of the MOS device is coupled to a control electrode, ( 10 ) of the chip ( 2 ) by means of a capacitor ( 12 ) of predetermined value within the chip ( 2 ).
1. A device ( 1 ) for detecting small quantities of electrical charge (Qs) comprising:
a chip ( 2 ) in which is integrated a MOS device having a floating gate ( 7 ) a first portion ( 7 a ) of which extends in facing relation with a recess ( 8 ) formed in the surface of the chip ( 2 ) and accessible from outside the chip ( 2 ) and able to retain an electrical charge (Qs) to be measured bound to it; a second portion ( 7 b ) of the gate ( 7 ) of the said device MOS being coupled to a control electrode ( 10 ) of the chip ( 2 ) by means of a capacitor ( 12 ) of predetermined value within the chip ( 2 ).
2. A device according to claim 1 , wherein said chip ( 2 ) is formed with a standard CMOS process.
3. A device according to claim 1 , wherein said first portion ( 7 a ) of the floating gate ( 7 ) is at least partially covered by a layer of interface material ( 9 ) which can bind an electrically charged material applied to it.
4. A device according to claim 1 , wherein said second portion ( 7 b ) of the floating gate ( 7 ) is capacitively coupled to an overlying supplementary layer ( 11 ) of conductive material, connected to a control electrode ( 10 ) accessible from outside the device ( 1 ).
5. A device according to claim 1 , wherein said MOS device comprises a substrate ( 3 ) of semiconductor material with p-type doping, and wherein said second portion ( 7 b ) of the floating gate ( 7 ) is capacitively coupled to a zone ( 13 ) of this substrate ( 3 ) which has an n+ type doping and which is connected to a control electrode ( 10 ) accessible from outside the device ( 1 ).
6. A device according to claim 4 , wherein the supplementary layer is polysilicon.