Adhesion layer for thin film transistors

1. A method for manufacturing a microcrystalline silicon layer on an insulator, the method comprising:

Providing a silicon-containing insulator;

Growing a thin adhesion-promoting layer comprising amorphous silicon having a thickness that is equal to or greater than 5 Å and less than 10 Å; and

Growing a microcrystalline silicon layer onto the adhesion-promoting layer to result in a microcrystalline silicon layer having an internal compressive stress below 900 Mpa.

2. The method according to claim 1 , wherein the thin adhesion-promoting layer is deposited by a low deposition rate (LDR) PECVD process comprising silane (SiH 4 ).

3. The method according to claim 1 , wherein the thin adhesion-promoting layer and the microcrystalline layer are grown in the same deposition system without breaking vacuum.

4. The method according to claim 1 , wherein the microcrystalline layer is deposited onto said adhesion-promoting layer by PECVD using a mixture of a silicon containing gas, a halogen containing gas and hydrogen.

5. The method according to claim 4 , wherein during deposition further a noble gas is being introduced.

6. The method according to claim 1 , wherein the insulator is chosen from the group of silicon oxide, silicon nitride, or silicon oxynitride (SiO x , SiN y , SiO x ,N y ) or combinations thereof.

7. The method according to claim 1 , wherein said microcrystalline silicon layer is grown on top of said insulator to form part of a thin film transistor (TFT).