IP Library Granted Patent US 7,864,281
Granted Patent B2
US 7,864,281 · App. 11/574,087 · Granted Jan 4, 2011

Active matrix substrate and display unit provided with it

Assignee: Sharp Kabushiki Kaisha
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Quick Facts
Patent No.
US 7,864,281
App. No.
11/574,087
Granted
Jan 4, 2011
Kind
B2
Abstract

An active matrix substrate includes a substrate; scanning lines formed on the substrate; an insulating film covering the scanning lines; signal lines intersecting the scanning lines via the insulating film; switching elements formed on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and pixel electrodes each capable of being electrically connected to the corresponding signal line via the switching elements. The insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer. The first insulating layer is formed of an insulating material containing an organic component, and the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being formed in the low-stack region. The active matrix substrate reduces the capacitance formed at each intersection between a scanning line and a signal line, without causing an increase in the wiring resistance or a degradation of the driving ability of switching elements.

Claims (50)

1. An active matrix substrate comprising:

a substrate;

a plurality of scanning lines arranged on the substrate;

an insulating film covering the plurality of scanning lines;

a plurality of signal lines intersecting the plurality of scanning lines via the insulating film;

a plurality of switching elements arranged on the substrate, each operating in response to a signal which is applied to the corresponding scanning line; and

a plurality of pixel electrodes each capable of being electrically connected to the corresponding signal line via the plurality of switching elements, wherein, the insulating film is a multilayer insulating film including a first insulating layer and a second insulating layer;

the first insulating layer is made of an insulating material containing an organic component;

the multilayer insulating film has a low-stack region in at least a portion of a region overlapping each switching element, the first insulating layer not being located in the low-stack region; and

the first insulating layer is arranged to underlie the second insulating layer.

2. The active matrix substrate of claim 1 , wherein the second insulating layer is formed of an inorganic insulating material.

3. The active matrix substrate of claim 1 , wherein each of the plurality of switching elements is a thin film transistor having: a semiconductor layer including a channel region; a gate electrode electrically connected to the corresponding scanning line; a source electrode electrically connected to the corresponding signal line; and a drain electrode electrically connected to the corresponding pixel electrode.

4. The active matrix substrate of claim 3 , wherein the multilayer insulating film has each low-stack region in a region overlapping at least the channel region.

5. The active matrix substrate of claim 3 , wherein,

the second insulating layer is formed over substantially the entire surface of the substrate; and

the second insulating layer has portions each located between the gate electrode and the semiconductor layer, each portion functioning as a gate insulating film.

6. The active matrix substrate of claim 3 , wherein an edge of the gate electrode is covered by the first insulating layer.

7. The active matrix substrate of claim 6 , wherein,

a surface of the multilayer insulating film facing the signal lines is recessed in each low-stack region; and

the semiconductor layer is formed so as to cover each low-stack region of the multilayer insulating film overlapping the channel region, in such a manner that a portion of the semiconductor layer rides over a region of the multilayer insulating film where the first insulating layer is formed.

8. The active matrix substrate of claim 1 , further comprising:

a plurality of storage capacitor lines formed on the substrate; and

a plurality of storage capacitor electrodes opposing the plurality of storage capacitor lines via the insulating film, wherein,

the multilayer insulating film also includes low-stack regions in between the storage capacitor lines and the storage capacitor electrodes.

9. The active matrix substrate of claim 8 , wherein edges of the storage capacitor lines are covered by the first insulating layer.

10. The active matrix substrate of claim 1 , wherein the multilayer insulating film also includes low-stack regions in portions of regions overlapping the signal lines.

11. The active matrix substrate of claim 10 , wherein the multilayer insulating film does not include any low-stack regions at intersections between the signal lines and the scanning lines.

12. The active matrix substrate of claim 10 , wherein,

the multilayer insulating film has slopes surrounding each low-stack region overlapping the signal lines;

the slopes include a first portion parallel to a direction in which the signal lines extend, and a second portion substantially orthogonal to the direction in which the signal lines extend; and

a tilt angle of the first portions with respect to a principal face of the substrate is greater than a tilt angle of the second portions with respect to the principal face of the substrate.

13. The active matrix substrate of claim 1 , further comprising an interlayer insulating film formed of a photosensitive material so as to cover the plurality of signal lines and the plurality of switching elements, wherein,

the plurality of pixel electrodes are formed on the interlayer insulating film;

each of the plurality of pixel electrodes is connected to the corresponding switching element at a contact hole which is formed in the interlayer insulating film; and

the multilayer insulating film does not have any low-stack region in a region overlapping the contact hole.

14. The active matrix substrate of claim 1 , having a plurality of pixel regions arrayed in a matrix, wherein the plurality of pixel electrodes are respectively provided in the plurality of pixel regions.

15. The active matrix substrate of claim 14 , having a display region defined by the plurality of pixel regions and a non-display region located around a perimeter of the display region, the non-display region having a plurality of terminals to which signals for driving the plurality of pixel regions are input, wherein,

the multilayer insulating film has a low-stack region over substantially the entire surface of the non-display region.

16. The active matrix substrate of claim 14 , wherein the multilayer insulating film has an annular low-stack region near an outer periphery of each of the plurality of pixel regions.

17. The active matrix substrate of claim 1 , wherein the first insulating layer is thicker than the second insulating layer, and has a lower relative dielectric constant than that of the second insulating layer.

18. The active matrix substrate of claim 1 , wherein the first insulating layer has a thickness of no less than 1.0 μm and no more than 4.0 μm.

19. The active matrix substrate of claim 1 , wherein the first insulating layer has a relative dielectric constant of 4.0 or less.

20. The active matrix substrate of claim 1 , wherein the first insulating layer is formed of a spin-on-glass (SOG) material having an Si—O—C bond backbone.

21. The active matrix substrate of claim 1 , wherein the first insulating layer is formed of a spin-on-glass (SOG) material having an Si—C bond backbone.

22. The active matrix substrate of claim 1 , wherein the first insulating layer is formed of a spin-on-glass (SOG) material containing a filler composed of silica.

23. The active matrix substrate of claim 1 , wherein the plurality of scanning lines have a wiring layer on at least the insulating film side, the wiring layer being composed of Ti or TiN.

24. The active matrix substrate of claim 1 , having a plurality of shield electrodes extending substantially parallel to the plurality of signal lines.

25. The active matrix substrate of claim 24 , wherein the plurality of shield electrodes are located so as to overlap edges of the plurality of pixel electrodes.

26. A display device comprising: the active matrix substrate of claim 1 ; and a display medium layer located on the active matrix substrate.

27. The display device of claim 26 , further comprising a counter substrate which opposes the active matrix substrate via the display medium layer, the display medium layer being a liquid crystal layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2016
From: SHARP KABUSHIKI KAISHA
To: MERCK PATENT GMBH
Reel/Frame 038229/0291 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2007
From: NAKAMURA, WATARU; BAN, ATSUSHI; OKAZAKI, SHOJI; KATSUI, HIROMITSU; OKADA, YOSHIHIRO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 019602/0556 →
Priority Claims (2)
JP 2004-243970 · Aug 24, 2004 · national
JP 2005-235006 · Aug 12, 2005 · national
Continuity (1)
Related Publication 20070268438A1 · Nov 22, 2007