Semiconductor device with a dummy electrode
View Patent ↗A semiconductor device according to an embodiment of the present invention includes a semiconductor chip. The semiconductor chip includes a semiconductor substrate, an interconnect layer, a back electrode (first working electrode), and a back dummy electrode (first dummy electrode). On the semiconductor substrate, the interconnect layer including an interconnect is provided. On a back surface of the semiconductor substrate, the back electrode is provided in electrical connection to the interconnect. On the back surface, also the back dummy electrode is provided, which is electrically insulated from the interconnect.
1. A semiconductor device comprising a semiconductor chip,
wherein said semiconductor chip includes:
a semiconductor substrate; an interconnect layer including an interconnect, provided on said semiconductor substrate;
a first working electrode provided on a back surface of said semiconductor substrate and electrically connected to said interconnect;
a first dummy electrode provided on said back surface of said semiconductor substrate and electrically insulated from said interconnect;
a second working electrode provided on said interconnect layer and electrically connected to said interconnect; and
a second dummy electrode provided on said interconnect layer and electrically insulated from said interconnect.
2. The semiconductor device according to claim 1 ,
wherein an upper surface of said second dummy electrode is at a higher level than an upper surface of said second working electrode, from said interconnect layer.
3. The semiconductor device according to claim 2 ,
wherein said second dummy electrode is provided on said interconnect layer via a spacer.
4. The semiconductor device according to claim 3 ,
wherein said spacer is an insulating layer.
5. The semiconductor device according to claim 4 ,
wherein said insulating layer is an organic insulating layer.
6. The semiconductor device according to claim 1 ,
wherein said first working electrode is smaller in area than said second working electrode, in a plan view.
7. The semiconductor device according to claim 1 ,
wherein said first or said second working electrode is a solder electrode.
8. The semiconductor device according to claim 1 ,
comprising a plurality of said semiconductor chips, wherein said semiconductor chips are stacked on each other; and two of said semiconductor chips disposed adjacent to each other are connected so that said first working electrode and said first dummy electrode of one of said two semiconductor chips are respectively connected to said second working electrode and said second dummy electrode of the other of said two semiconductor chips.
9. A semiconductor device comprising a semiconductor chip,
wherein said semiconductor chip includes:
a semiconductor substrate; an interconnect layer including an interconnect, provided on said semiconductor substrate;
a first working electrode provided on a back surface of said semiconductor substrate and electrically connected to said interconnect; and
a first dummy electrode provided on said back surface of said semiconductor substrate and electrically insulated from said interconnect,
and wherein said first working electrode is smaller in area than said first dummy electrode, in a plan view.
10. The semiconductor device according to claim 9 , wherein the first working electrode and the first dummy electrode each comprise at least one layer.
11. The semiconductor device according to claim 10 , wherein the first working electrode and the first dummy electrode each comprise a multilayer including a layer of at least one of Ti, Cu or Ni.
12. The semiconductor device according to claim 9 , wherein the first working electrode and the first dummy electrode each include an adhesion layer.
13. The semiconductor device according to claim 12 , wherein the adhesion layer is formed from Ti.