Semiconductor device
View Patent ↗A semiconductor device includes an output MOS transistor to control a current flowing into an L-load in accordance with a gate signal input to its gate. A level shifter shifts the level of an input signal based on a power supply voltage at a Vcc terminal to generate the gate signal. A control signal adjuster detects an output voltage between the L-load and the output MOS transistor based on the power supply voltage and adjusts the level of the gate signal.
1. A semiconductor device comprising:
an output transistor connected between an output terminal connected with a load and a low-voltage terminal;
a level shifter connected between a high-voltage terminal and the low-voltage terminal, to input a control signal generated by level-shifting an input signal to a control terminal of the output transistor;
a first voltage detection transistor to control an electrical connection between the output terminal and the low-voltage terminal in accordance with a voltage at the high-voltage terminal; and
a second voltage detection transistor to control an electrical connection between the control terminal of the output transistor and the low-voltage terminal in accordance with a voltage at the output terminal.
2. The semiconductor device according to claim 1 , wherein
a control terminal of the first voltage detection transistor is connected to the high-voltage terminal.
3. The semiconductor device according to claim 1 , further comprising:
a voltage dividing resistor to divide a voltage at the high-voltage terminal,
wherein a control terminal of the first voltage detection transistor is connected to the voltage dividing resistor.
4. The semiconductor device according to claim 1 , further comprising:
a resistor element connected between the first voltage detection transistor and the output terminal,
wherein a control terminal of the second voltage detection transistor is connected between the first voltage detection transistor and the resistor element.
5. A semiconductor device comprising:
an output terminal connected to a power supply through a load;
an output transistor to control a current flowing into the load through the output terminal; and
a pull-down circuit to pull down the output transistor in accordance with a voltage at the output terminal when a voltage at a high-voltage terminal through which power is supplied is equal to or lower than a prescribed level
a first and a second voltage dividing resistors to divide the voltage at the high-voltage terminal,
wherein the pull-down circuit comprises:
a first voltage detector connected between the first and the second voltage dividing resistors, to detect whether or not a voltage between the first and the second voltage dividing resistors is eciual to or lower than a first level; and
a second voltage detector to detect whether or not a voltage at the output terminal is equal to or higher than a second level, wherein
the first voltage detector turns on a voltage detecting function of the second voltage detector when the voltage between the first and the second voltage dividing resistors is equal to or lower than the first level, and
the second voltage detector pulls-down the output transistor when the voltage at the output terminal is equal to or higher than the second level.
6. The semiconductor device according to claim 5 , wherein the pull-down circuit comprises:
a first voltage detector to detect whether or not the voltage at the high-voltage terminal is equal to or lower than a first level; and
a second voltage detector to detect whether or not a voltage at the output terminal is equal to or higher than a second level.
7. The semiconductor device according to claim 6 , wherein
the first voltage detector turns on a voltage detecting function of the second voltage detector when the voltage at the high-voltage terminal is equal to or lower than the first level, and the second voltage detector pulls-down the output transistor when the voltage at the output terminal is equal to or higher than the second level.