Magnetic tunnel junction memory and method with etch-stop layer
View Patent ↗Methods and apparatus are provided for magnetoresistive memories employing magnetic tunnel junction (MTJ). The apparatus comprises a MTJ ( 61, 231 ), first ( 60, 220 ) and second ( 66, 236 ) electrodes coupled, respectively, to first ( 62, 232 ) and second ( 64, 234 ) magnetic layers of the MTJ ( 61, 231 ), first ( 54, 204 ) and second ( 92, 260 ) write conductors magnetically coupled to the MTJ ( 61, 231 ) and spaced apart from the first ( 60, 220 ) and second ( 66, 236 ) electrodes, and at least one etch-stop layer ( 82, 216 ) located between the first write conductor ( 54, 204 ) and the first electrode ( 60, 220 ), having an etch rate in a reagent for etching the MTJ ( 61, 231 ) and/or the first electrode ( 60, 220 ) that is at most 25 % of the etch rate of the MTJ ( 61, 231 ) and/or first conductor ( 60, 220 ) to the same reagent, so as to allow portions of the MTJ ( 61, 231 ) and first electrode ( 60, 220 ) to be removed without affecting the underlying first write conductor ( 54, 204 ). In a further embodiment, a second etch-stop layer ( 90, 250 ) is located between the second electrode ( 66, 236 ) and the second write conductor ( 92, 260 ). Improved yield and performance are obtained.
1. A method for forming an array of magnetoresistive random access memory (MRAM) bits employing magnetic tunnel junctions (MTJ), wherein at least some individual MRAM bits are formed by the method, comprising:
providing a substrate comprising first conductive write line insulated from the substrate and having an upper surface;
forming a first etch-stop layer above the upper surface;
forming above the first etch-stop layer a magnetic tunnel junction (MTJ) comprising upper and lower electrodes wherein the lower electrode is separated from the first write line by at least the first etch-stop layer;
etching at least the lower electrode with a reagent to which the etch-stop layer is substantially impervious;
forming an upper interconnect coupled to the upper electrode of the MTJ;
forming a dielectric layer above the upper interconnect; and
forming a second conductive write line overlying the dielectric layer.
2. The method for forming an array of MRAM bits employing MJT of claim 1 , wherein the lower electrode comprises tantalum, tantalum nitride or a combination thereof.
3. The method for forming an array of MRAM bits employing MJT of claim 1 , wherein the etching step comprises etching using a halogen containing reagent.
4. The method for forming an array of MRAM bits employing MJT of claim 3 , wherein the first etch-stop layer comprises magnesium oxide or aluminum oxide or aluminum nitride or a combination thereof.
5. The method for forming an array of MRAM bits employing MJT of claim 3 , wherein the reagent is a halogen containing plasma.
6. The method for forming an array of MRAM bits employing MJT of claim 1 , further comprising forming a further dielectric layer located between the etch-stop layer and the write line.
7. The method for forming an array of MRAM bits employing MJT of claim 1 , further comprising forming a further dielectric layer located between the etch-stop layer and the MTJ.
8. A method for forming magnetoresistive memory arrays employing magnetic tunnel junctions (MTJ), comprising:
providing a substrate comprising a first conductive write line insulated from the substrate and having an upper surface;
forming a first etch-stop layer above the upper surface;
forming a first electrode layer above the first etch-stop layer;
forming a MTJ with first and second magnetic layers and a tunneling dielectric therebetween, wherein the first magnetic layer is in contact with the first electrode layer and magnetically coupled to the first conductive write line;
forming a second electrode in contact a second magnetic layer of the MTJ;
etching away portions of the MTJ and first electrode without substantially removing the first etch stop layer; and
forming a second conductive write line spaced apart and insulated from the second electrode and magnetically coupled to the MTJ.
9. The method for forming magnetoresistive memory arrays employing MTJ of claim 8 , wherein the etching step comprises etching using a halogen containing reagent.
10. The method for forming magnetoresistive memory arrays employing MTJ of claim 9 wherein the first etch-stop layer comprises magnesium oxide or aluminum oxide or aluminum nitride or combinations thereof.
11. The method for forming magnetoresistive memory arrays employing MTJ of claim 10 , wherein the first electrode layer comprise tantalum, tantalum nitride or combinations thereof.
12. The method for forming magnetoresistive memory arrays employing MTJ of claim 8 , further comprising prior to forming the second conductive write line, forming a second etch-stop layer located between the second electrode and the second conductive write line.
13. The method for forming magnetoresistive memory arrays employing MTJ of claim 12 , wherein the second etch-stop layer comprises magnesium oxide or aluminum oxide or aluminum nitride or combinations thereof.
14. The method for forming magnetoresistive memory arrays employing MTJ of claim 12 , further comprising, providing a dielectric planarizing layer between the second electrode and the second etch-stop layer.