Patent Assignment
Reel/Frame 022597/0062
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2009-04-24
Received: 2009-04-24
Pages: 18
Assignor
FREESCALE SEMICONDUCTOR, INC.
Executed: 2009-02-25
Assignee
EVERSPIN TECHNOLOGIES, INC.
1300 N. ALMA SCHOOL ROAD, CHANDLER, AZ, 85224, UNITED STATES
Covered Applications
(91)
MRAM MEMORY CONDITIONING
App. No. 11/678,346
→
MAGNETIC TUNNEL JUNCTION MEMORY AND METHOD WITH ETCH-STOP LAYER
App. No. 11/584,411
→
SENSE AMPLIFIER WITH MULTIPLE BITS SHARING A COMMON REFERENCE
App. No. 11/422,774
→
METHOD OF MANUFACTURING A MAGNETOELECTRONIC DEVICE
App. No. 11/351,610
→
MRAM WITH A WRITE DRIVER AND METHOD THEREFOR
App. No. 11/297,202
→
MRAM MEMORY WITH RESIDUAL WRITE FIELD RESET
App. No. 11/297,203
→
MAGNETIC TUNNEL JUNCTION CURRENT SENSORS
App. No. 11/262,053
→
METHODS OF IMPLEMENTING MAGNETIC TUNNEL JUNCTION CURRENT SENSORS
App. No. 11/262,054
→
PASSIVE ELEMENTS IN MRAM EMBEDDED INTEGRATED CIRCUITS
App. No. 11/217,146
→
SENSOR WITH MAGNETIC TUNNEL JUNCTION AND MOVEABLE MAGNETIC FIELD SOURCE
App. No. 11/192,802
→
MAGNETIC TUNNEL JUNCTION SENSOR METHOD
App. No. 11/192,570
→
METHOD FOR TUNNEL JUNCTION SENSOR WITH MAGNETIC CLADDING
App. No. 11/192,517
→
MRAM EMBEDDED SMART POWER INTEGRATED CIRCUITS
App. No. 11/170,874
→
ANTIFUSE CIRCUIT
App. No. 11/166,139
→
3-D INDUCTOR AND TRANSFORMER DEVICES IN MRAM EMBEDDED INTEGRATED CIRCUITS
App. No. 11/147,599
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NONVOLATILE MEMORY SYSTEM USING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM)
App. No. 11/130,351
→
TRIPLE PULSE METHOD FOR MRAM TOGGLE BIT CHARACTERIZATION
App. No. 11/118,145
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LOW POWER MAGNETOELECTRONIC DEVICE STRUCTURES UTILIZING ENHANCED PERMEABILITY MATERIALS
App. No. 11/066,884
→
MAGNETOELECTRONIC DEVICES UTILIZING PROTECTIVE CAPPING LAYERS AND METHODS OF FABRICATING THE SAME
App. No. 11/048,015
→
REDUCED POWER MAGNETORESISTIVE RANDOM ACCESS MEMORY ELEMENTS
App. No. 10/997,118
→
METHODS AND STRUCTURES FOR ELECTRICAL COMMUNICATION WITH AN OVERLYING ELECTRODE FOR A SEMICONDUCTOR ELEMENT
App. No. 10/993,196
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE STRUCTURES AND METHODS FOR FABRICATING THE SAME
App. No. 10/977,003
→
SPIN-TRANSFER BASED MRAM USING ANGULAR-DEPENDENT SELECTIVITY
App. No. 10/971,741
→
CIRCUIT AND METHOD FOR CURRENT PULSE COMPENSATION
App. No. 10/924,631
→
METHOD AND STRUCTURE FOR CONTACTING AN OVERLYING ELECTRODE FOR A MAGNETOELECTRONICS ELEMENT
App. No. 10/922,436
→
MAGNETIC TUNNEL JUNCTION ELEMENT STRUCTURES AND METHODS FOR FABRICATING THE SAME
App. No. 10/899,610
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY SIMULATION
App. No. 10/806,612
→
APPARATUS FOR PULSE TESTING A MRAM DEVICE AND METHOD THEREFORE
App. No. 10/746,014
→
SYNTHETIC ANTIFERROMAGNET STRUCTURES FOR USE IN MTJS IN MRAM TECHNOLOGY
App. No. 10/740,338
→
MRAM HAVING ERROR CORRECTION CODE CIRCUITRY AND METHOD THEREFOR
App. No. 10/736,852
→
REDUCING POWER CONSUMPTION DURING MRAM WRITES USING MULTIPLE CURRENT LEVELS
App. No. 10/737,114
→
MRAM DEVICE INTEGRATED WITH OTHER TYPES OF CIRCUITRY
App. No. 10/730,239
→
WRITE DRIVER FOR A MAGNETORESISTIVE MEMORY
App. No. 10/656,676
→
CIRCUIT FOR WRITE FIELD DISTURBANCE CANCELLATION IN AN MRAM AND METHOD OF OPERATION
App. No. 10/656,646
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH REDUCED SWITCHING FIELD VARIATION
App. No. 10/648,466
→
METHOD OF WRITING TO A MULTI-STATE MAGNETIC RANDOM ACCESS MEMORY CELL
App. No. 10/647,976
→
OBLIQUE DEPOSITION TO INDUCE MAGNETIC ANISOTROPY FOR MRAM CELLS
App. No. 10/611,789
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MRAM ELEMENT AND METHODS FOR WRITING THE MRAM ELEMENT
App. No. 10/609,288
→
MAGNETOELECTRONICS INFORMATION DEVICE HAVING A COMPOUND MAGNETIC FREE LAYER
App. No. 10/437,831
→
METHODS FOR CONTACTING CONDUCTING LAYERS OVERLYING MAGNETOELECTRONIC ELEMENTS OF MRAM DEVICES
App. No. 10/421,096
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
App. No. 10/421,095
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE STRUCTURES AND METHODS FOR FABRICATING THE SAME
App. No. 10/417,851
→
METHODS FOR FABRICATING MRAM DEVICE STRUCTURES
App. No. 10/417,537
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MAGNETIC MEMORY AND METHOD OF BI-DIRECTIONAL WRITE CURRENT PROGRAMMING
App. No. 10/401,195
→
MRAM ARCHITECTURE WITH A GROUNDED WRITE BIT LINE AND ELECTRICALLY ISOLATED READ BIT LINE
App. No. 10/346,256
→
MRAM ARCHITECTURE
App. No. 10/331,058
→
METHOD FOR FABRICATING A FLUX CONCENTRATING SYSTEM FOR USE IN A MAGNETOELECTRONICS DEVICE
App. No. 10/324,716
→
SYNTHETIC ANTIFERROMAGNETIC STRUCTURE FOR MAGNETOELECTRONIC DEVICES
App. No. 10/322,979
→
METHOD AND STRUCTURE FOR CONTACTING AN OVERLYING ELECTRODE FOR A MAGNETOELECTRONICS ELEMENT
App. No. 10/309,514
→
CLADDED CONDUCTOR FOR USE IN A MAGNETOELECTRONICS DEVICE AND METHOD FOR FABRICATING THE SAME
App. No. 10/306,250
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) CELL HAVING A DIODE WITH ASYMMETRICAL CHARACTERISTICS
App. No. 10/304,625
→
METHOD AND APPARATUS FOR SIMULATING A MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM)
App. No. 10/302,203
→
HIGH THROUGHPUT DUAL ION BEAM DEPOSITION APPARATUS
App. No. 10/285,161
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NANOCRYSTALLINE LAYERS FOR IMPROVED MRAM TUNNEL JUNCTIONS
App. No. 10/232,111
→
AMORPHOUS ALLOYS FOR MAGNETIC DEVICES
App. No. 10/232,164
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MAGNETIC RANDOM ACCESS MEMORY HAVING A VERTICAL WRITE LINE
App. No. 10/228,684
→
MAGNETORESISTANCE RANDOM ACCESS MEMORY
App. No. 10/209,156
→
HIGH SENSITIVITY SENSOR FOR TAGGED MAGNETIC BEAD BIOASSAYS
App. No. 10/209,524
→
MULTI-STATE MAGNETORESISTANCE RANDOM ACCESS CELL WITH IMPROVED MEMORY STORAGE DENSITY
App. No. 10/198,203
→
MRAM ARCHITECTURE WITH ELECTRICALLY ISOLATED READ AND WRITE CIRCUITRY
App. No. 10/185,868
→
MEMORY ARCHITECTURE WITH WRITE CIRCUITRY AND METHOD THEREFOR
App. No. 10/185,888
→
SENSE AMPLIFIER AND METHOD FOR PERFORMING A READ OPERATION IN A MRAM
App. No. 10/185,566
→
BALANCED LOAD MEMORY AND METHOD OF OPERATION
App. No. 10/184,720
→
MEMORY HAVING WRITE CURRENT RAMP RATE CONTROL
App. No. 10/185,075
→
MEMORY HAVING A PRECHARGE CIRCUIT AND METHOD THEREFOR
App. No. 10/185,488
→
MAGNETIC SHIELDING FOR ELECTRONIC CIRCUITS WHICH INCLUDE MAGNETIC MATERIALS
App. No. 10/184,536
→
CIRCUIT AND METHOD OF WRITING A TOGGLE MEMORY
App. No. 10/186,141
→
CIRCUIT AND METHOD FOR READING A TOGGLE MEMORY CELL
App. No. 10/184,811
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH REDUCED SWITCHING FIELD
App. No. 10/173,907
→
METHOD OF FABRICATING A SELF-ALIGNED MAGNETIC TUNNELING JUNCTION AND VIA CONTACT
App. No. 10/133,136
→
MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHOD OF FABRICATION THEREOF
App. No. 10/109,429
→
METHOD OF FABRICATING A SELF-ALIGNED VIA CONTACT FOR A MAGNETIC MEMORY ELEMENT
App. No. 10/095,816
→
METHOD OF APPLYING CLADDING MATERIAL ON CONDUCTIVE LINES OF MRAM DEVICES
App. No. 10/093,909
→
MRAM WITHOUT ISOLATION DEVICES
App. No. 10/051,646
→
MAGNETO-ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING
App. No. 10/029,085
→
NARROW GAP CLADDING FIELD ENHANCEMENT FOR LOW POWER PROGRAMMING OF A MRAM DEVICE
App. No. 10/010,574
→
CONDUCTIVE LINE WITH MULTIPLE TURNS FOR PROGRAMMING A MRAM DEVICE
App. No. 10/010,812
→
CLADDING OF A CONDUCTIVE INTERCONNECT FOR PROGRAMMING A MRAM DEVICE USING MULTIPLE MAGNETIC LAYERS
App. No. 10/010,363
→
METHOD OF WRITING TO SCALABLE MAGNETORESISTANCE RANDOM ACCESS MEMORY ELEMENT
App. No. 09/978,859
→
MAGNETORESISTANCE RANDOM ACCESS MEMORY FOR IMPROVED SCALABILITY
App. No. 09/978,860
→
MRAM WITH MIDPOINT GENERATOR REFERENCE AND METHOD FOR READOUT
App. No. 09/940,320
→
MAGNETO-ELECTRONIC COMPONENT
App. No. 09/940,263
→
MAGNETO-ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
App. No. 09/940,319
→
MAGNETORESISTIVE LEVEL GENERATOR AND METHOD
App. No. 09/935,269
→
MAGNETORESISTIVE MIDPOINT GENERATOR AND METHOD
App. No. 09/793,163
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MAGNETOELECTRONICS ELEMENT HAVING A STRESSED OVER-LAYER CONFIGURED FOR ALTERATION OF THE SWITCHING ENERGY BARRIER
App. No. 09/792,466
→
NON-VOLATILE MAGNETIC CACHE MEMORY AND METHOD OF USE
App. No. 09/774,983
→
NON-VOLATILE MAGNETIC REGISTER
App. No. 09/774,949
→
REFERENCE VOLTAGE GENERATOR FOR MRAM AND METHOD
App. No. 09/772,668
→
MRAM ARCHITECTURE AND SYSTEM
App. No. 09/772,669
→
MRAM write apparatus and method
App. No. 09/754,458
→