IP Library Granted Patent US 7,082,389
Granted Patent B2
US 7,082,389 · App. 10/302,203 · Granted Jul 25, 2006

Method and apparatus for simulating a magnetoresistive random access memory (MRAM)

Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,082,389
App. No.
10/302,203
Granted
Jul 25, 2006
Kind
B2
Abstract

A method and apparatus ( 500 ) for simulating a magnetoresistive random access memory (MRAM) ( 102 ) uses non-linear functions to model both non-linear magnetic tunnel junction (MTJ) effects and non-linear state switching effects. The method includes calculating a high threshold (T HI ) and a low threshold (T LO ) based on a function of the hard axis current (I H ). The easy axis current (I E ) is compared to the high threshold (T HI ). If the easy axis current is greater than the high threshold, the MTJ resistance (R HI ) is set to represent a stored high value. The easy axis current is compared to the low threshold. If the easy axis current is less than the low threshold, the MTJ resistance (R LO ) is set to represent a stored low value. By using non-linear functions to model the MTJ effects and switching effects, the behavior of an MRAM ( 102 ) can be more accurately simulated.

Claims (49)

1. A method for simulating an integrated circuit magnetoresistive random access memory (MRAM) having a first conductor, a second conductor, and a magnetic tunnel junction (MTJ), the first conductor disposed substantially orthogonal to the second conductor, the MTJ disposed between the first conductor and the second conductor, comprising the steps of:

calculating a first current in the first conductor;

calculating a second current in the second conductor;

calculating a first threshold, the first threshold being a first function of the first current;

comparing the second current to the first threshold, if the second current is greater than the first threshold, setting a resistance of the MTJ to a first resistance value;

calculating a second threshold, the second threshold being a second function of the first current;

comparing the second current to the second threshold, if the second current is less than the second threshold, setting the resistance of the MTJ to a second resistance value; and

calculating an MTJ current using the resistance of the MTJ.

2. The method of claim 1 , wherein the first threshold represents a programming current threshold for programming a high logic state into a MRAM cell, and the second threshold represents a programming current threshold for programming a low logic state into the MRAM cell.

3. The method of claim 1 , wherein the first resistance value is modeled using R/(1+J 2 V 2 +J 4 V 4 ), where R is a predetermined resistance of the MTJ, J 2 and J 4 are predetermined second and forth order coefficients, respectively, and V is a predetermined MTJ voltage value.

4. The method of claim 1 , wherein the second resistance value is modeled using R/(1+J 1 V+J 2 V 2 ), where R is a predetermined resistance of the MTJ, J 1 and J 2 are predetermined first and second order coefficients, respectively, and V is a predetermined MTJ voltage value.

5. The method of claim 1 , wherein the first current is characterized as being a hard axis current and the second current is characterized as being an easy axis current.

6. The method of claim 5 , wherein the easy axis current is used to switch between the first and second resistance values and the hard axis current is used to change the first and second thresholds.

7. The method of claim 1 , wherein the first function of the first current and the second function of the first current are based on a magnetic field calculation where

H TH =H SW *max (1 +K 1 ( H H /H SW )+ K 2 (( H H /H SW ) 2 , K floor ))

and where H TH is a switching threshold magnetic field, H SW is a zero hard axis field switching threshold, H H is a predetermined hard axis field, K 1 is a first order coefficient, K 2 is a second order coefficient, and K floor is a minimum switching threshold.

8. A magnetoresistive random access memory (MRAM) simulator used to simulate a behavior of an MRAM having a first conductor, a second conductor, and a magnetic tunnel junction (MTJ), the first conductor disposed substantially orthogonal to the second conductor, the MTJ disposed between the first conductor and the second conductor, the simulator comprising:

means for calculating a first current in the first conductor;

means for calculating a second current in the second conductor;

means for calculating a first threshold, the first threshold being a first function of the first current;

means for comparing the second current to the first threshold, if the second current is greater than the first threshold, setting a resistance of the MTJ to a first resistance value;

means for calculating a second threshold, the second threshold being a second function of the first current;

means for comparing the second current to the second threshold, if the second current is less than the second threshold, setting the resistance of the MTJ to a second resistance value; and

means for calculating an MTJ current using the resistance of the MTJ.

9. The simulator of claim 8 , wherein the first threshold represents a programming current threshold for programming a high logic state into a MRAM cell, and the second threshold represents a programming current threshold for programming a low logic state into the MRAM cell.

10. The simulator of claim 8 , wherein the first resistance value is modeled using R/(1+J 2 V 2 +J 4 V 4 ), where R is a predetermined resistance of the MTJ, J 2 and J 4 are predetermined second and forth order coefficients, respectively, and V is a predetermined MTJ voltage value.

11. The simulator of claim 8 , wherein the second resistance value is modeled using R/(1+J 1 V+J 2 V 2 ), where R is a predetermined resistance of the MTJ, J 1 and J 2 are predetermined first and second order coefficients, respectively, and V is a predetermined MTJ voltage value.

12. The simulator of claim 8 , wherein the first current is characterized as being a hard axis current and the second current is characterized as being an easy axis current.

13. The simulator of claim 12 , wherein the easy axis current is used to switch between the first and second resistance values and the hard axis current is used to change the first and second thresholds.

14. The simulator of claim 8 , wherein the first function of the first current and the second function of the first current are based on a magnetic field calculation where

H TH =H SW *max (1 +K 1 ( H H /H SW )+ K 2 (( H H /H SW ) 2 , K floor ))

and where H TH is a switching threshold magnetic field, H SW is a zero hard axis field switching threshold, H H is a predetermined hard axis field, K 1 is a first order coefficient, K 2 is a second order coefficient, and K floor is a minimum switching threshold.

15. The simulator of claim 8 , wherein the simulator is a computer program and the means for calculating and means for comparing are implemented using a data processing system.

16. A computer readable medium having stored instructions for simulating the behavior of a magnetoresistive random access memory (MRAM), the MRAM having a first conductor, a second conductor, and a magnetic tunnel junction (MTJ), the first conductor disposed substantially orthogonal to the second conductor, the MTJ disposed between the first conductor and the second conductor, the computer readable medium comprising:

instructions for calculating a first current in the first conductor;

instructions for calculating a second current in the second conductor;

instructions for calculating a first threshold, the first threshold being a first function of the first current;

instructions for comparing the second current to the first threshold, if the second current is greater than the first threshold, setting a resistance of the MTJ to a first resistance value;

instructions for calculating a second threshold, the second threshold being a second function of the first current;

instructions for comparing the second current to the second threshold, if the second current is less than the second threshold, setting the resistance of the MTJ to a second resistance value; and

instructions for calculating an MTJ current using the resistance of the MTJ.

17. The computer readable medium of claim 16 , wherein the first threshold represents a programming current threshold for programming a high logic state into a MRAM cell, and the second threshold represents a programming current threshold for programming a low logic state into the MRAM cell.

18. The computer readable medium of claim 16 , wherein the first resistance value is modeled using R/(1+J 2 V 2 +J 4 V 4 ), where R is a predetermined resistance of the MTJ, J 2 and J 4 are predetermined second and forth order coefficients, respectively, and V is a predetermined MTJ voltage value.

19. The simulator of claim 16 , wherein the second resistance value is modeled using R/(1+J 1 V+J 2 V 2 ), where R is a predetermined resistance of the MTJ, J 1 and J 2 are predetermined first and second order coefficients, respectively, and V is a predetermined MTJ voltage value.

20. The simulator of claim 16 , wherein the first current is characterized as being a hard axis current and the second current is characterized as being an easy axis current.

21. The simulator of claim 20 , wherein the easy axis current is used to switch between the first and second resistance values and the hard axis current is used to change the first and second thresholds.

22. The simulator of claim 16 , wherein the first function of the first current and the second function of the first current are based on a magnetic field calculation where

H TH =H SW *max (1 +K 1 ( H H /H SW )+ K 2 (( H H /H SW ) 2 , K floor ))

and where H TH is a switching threshold magnetic field, H SW is a zero hard axis field switching threshold, H H is a predetermined hard axis field, K 1 is a first order coefficient, K 2 is a second order coefficient, and K floor is a minimum switching threshold.

Assignments (6)
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
RELEASE OF SECURITY INTEREST Recorded Jul 30, 2010
From: CITIBANK, N.A.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 024767/0398 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 022597/0062 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2004
From: MOTOROLA, INC
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 015360/0718 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2002
From: NAHAS, JOSEPH J.
To: MOTOROLA, INC.
Reel/Frame 013551/0611 →
Continuity (1)
Related Publication 20040102943A1 · May 27, 2004