IP Library Granted Patent US 7,973,858
Granted Patent B2
US 7,973,858 · App. 11/585,345 · Granted Jul 5, 2011

Reduced memory and bandwidth motion adaptive video deinterlacing

Assignee: LSI Corporation
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Quick Facts
Patent No.
US 7,973,858
App. No.
11/585,345
Granted
Jul 5, 2011
Kind
B2
Abstract

A method for reduced memory and bandwidth motion adaptive video deinterlacing is disclosed. The method generally includes the steps of (A) generating a frame by deinterlacing a current field in a first of a plurality of modes, (B) generating the frame by deinterlacing using both of the current field and an opposite-parity field in a second of the modes and (C) generating the frame be deinterlacing using all of the current field, the opposite-parity field and another field in a third of the modes, wherein the method uses at least two of the modes.

Claims (45)

1. A method of motion adaptive video deinterlacing, comprising the steps of:

(A) generating a frame by deinterlacing a current field in a first of a plurality of modes;

(B) generating said frame by deinterlacing using both of said current field and an opposite-parity field in a second of said modes,

(C) generating said frame by deinterlacing using all of said current field, said opposite-parity field and another field in a third of said modes;

(D) determining a stationary condition on a per-pixel bases between said opposite-parity field and said another field; and

(E) selecting said third mode if said stationary condition is true.

2. The method according to claim 1 , further comprising the step of:

switching between using different combinations of said modes such that at least one constraint of (i) a memory constraint and (ii) a system bandwidth constraint characterizes one of (a) a system or (b) a particular operational mode of said system.

3. The method according to claim 1 , further comprising the step of:

buffering (i) in a memory external to a module configured to generate said frame and (ii) to generate said frame (a) no greater than one field worth of data in said first mode, (b) no greater than two fields worth of data in said second mode and (c) no greater than three fields worth of data in said third mode.

4. The method according to claim 1 , further comprising the step of:

transferring (i) from a memory to a module configured to generate said frame and (ii) to generate said frame (a) no fields other than said current field in said first mode, (b) no fields other than said current field and said opposite-parity field in said second mode and (c) no fields other than said current field, said opposite-parity field and said another field in said third mode.

5. The method according to claim 1 , further comprising the step of:

generating said frame by deinterlacing using both (i) a variable number of one or more luminance fields and (ii) said variable number of one or more chrominance fields in a fourth of said modes.

6. The method according to claim 5 , further comprising the step of:

switching between said first mode, said second mode, said third mode and said fourth mode.

7. The method according to claim 1 , further comprising the step of:

changing a number of luminance fields used in deinterlacing in response to a system reconfiguration.

8. The method according to claim 1 , further comprising the step of:

changing a number of chrominance fields used in deinterlacing in response to a system reconfiguration.

9. The method according to claim 1 , wherein both said opposite-parity field and said another field occur in time before said current field.

10. A system comprising:

a memory configured to buffer a current field; and

a module configured to (i) generate a frame by deinterlacing said current field in a first of a plurality of modes, (ii) generate said frame by deinterlacing using both of said current field and an opposite parity field in a second of said modes, (iii) generate said frame by deinterlacing using all of said current field, said opposite parity field and another field in a third of said modes, (iv) determine a stationary condition on a per-pixel bases between said opposite-parity field and said another field and (v) select said third mode if said stationary condition is true.

11. A method of motion adaptive video deinterlacing, comprising the steps of:

(A) generating a plurality of current field counts for a plurality of current pixel locations in a current field, wherein each of said current field counts tracks a stationary history of a respective one of said current pixel locations; and

(B) generating a frame by deinterlacing said current field based on said current field counts.

12. The method according to claim 11 , wherein step (B) is further based on a plurality of previous field counts of a plurality of previous pixel locations in a previous field.

13. The method according to claim 11 , further comprising the step of:

updating said current field counts based on a plurality of stationary checks, one each in a luminance channel of said current field, a first chrominance channel of said current field and a second chrominance channel of said current field.

14. The method according to claim 11 , further comprising the step of:

setting said current field counts to a predetermined value.

15. A method of motion adaptive video deinterlacing, comprising the steps of:

(A) in a first mode, generating a frame by spatial-temporal blending a current field, a previous field and a next field;

(B) in a second mode, generating said frame by spatial-temporal blending said current field and said previous field; and

(C) selecting a plurality of co-located field pixels from one of two opposite-parity fields relative to said current field, wherein said co-located field pixels are used in said spatial-temporal blending.

16. The method according to claim 15 , further comprising the step of:

in a third mode, generating said frame by spatial-temporal blending said current field and said next field.

17. The method according to claim 15 , wherein said spatial-temporal blending comprises a median operation.

18. The method according to claim 15 , wherein said spatial-temporal blending comprises a nonlinear operation.

19. The method according to claim 15 , further comprising the step of:

limiting a change from a spatial filtering based on a difference between said previous field and said next field.

20. A system comprising:

a controller configured to generate a plurality of configuration signals that enable use of a previous field and a next field separately to deinterlace a plurality of luminance fields and a plurality of chrominance fields of a current field; and

a module configured to generate a frame by deinterlacing using any set of said luminance fields and said chrominance fields based on said configuration signals, said set including a current field only configuration.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
MERGER Recorded May 9, 2011
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 026243/0530 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2007
From: PAI, CHENG-YU; WINGER, LOWELL L.
To: LSI LOGIC CORPORATION
Reel/Frame 019089/0957 →
Continuity (1)
Related Publication 20080094505A1 · Apr 24, 2008