Switch pre-driver system and method
Switch pre-driver systems and methods are described. The present switch pre-driver systems and methods facilitate switch driver breakdown protection, reduction of leakage current, and avoidance of false switching. In one embodiment, a switch system includes a switch driver, a switch pre-driver, and a mode detection circuit. The switch driver drives a voltage. The switch pre-driver controls the switch driver. The mode detection circuit notifies the switch pre-driver of a mode condition.
1 . A switch system comprising:
a switch driver for driving a voltage;
a switch pre-driver for controlling said switch driver; and
a detection circuit for notifying said switch pre-driver of a mode condition.
2 . A switch system of claim 1 wherein said switch driver is a single transistor.
3 . A switch system of claim 1 wherein said switch pre-driver sets a driver control signal equal to a base power voltage level (vpwr) disabling said switch driver when a point to point voltage level input (Vpp 13 in) is at or below said base power voltage level.
4 . A switch system of claim 1 wherein said switch pre-driver sets a driver control signal to follow a point to point voltage input (Vpp 13 in) keeping said switch driver turned off when said point to point voltage input (Vpp 13 in) is in between a base power voltage level (vpwr) and a trip voltage (Vtrip).
5 . A switch system of claim 1 wherein said switch pre-driver sets a driver control signal to turn on said switch driver when point a point to point voltage input (Vpp 13 in) level is above a trip voltage (Vtrip).
6 . A switch system of claim 1 wherein an output of said switch pre-driver is maintained at a level such that the difference between a point to point voltage level (Vpp 13 in) and a driver control signal (vppgate) is less than a breakdown limit of components of said driver switch.
7 . A switch system of claim 1 further comprising a well bias device for notifying said switch pre-driver of a break-down condition.
8 . A switch system of claim 7 wherein a notification level is adjustable.
9 . A switch system of claim 7 wherein an output of said switch pre-driver is a function of one Vtn.
10 . A switching method comprising:
protecting a switch driver from device breakdown when a high voltage is applied;
reducing false switching in said switch driver; and
minimizing leakage current in said switch driver during normal mode.
11 . A switching method of claim 10 wherein minimizing leakage current includes disabling said switch driver in normal mode.
12 . A switching method of claim 10 wherein said reducing false switching comprises:
detecting a desired trip voltage; and
preventing said switch driver from entering an increased voltage level mode until said desired trip voltage is detected.
13 . A switching method of claim 10 wherein minimizing leakage current includes ensuring a high voltage switch is off during a normal mode.
14 . A switching method of claim 10 further comprising adjusting a bias voltage.
15 . A switch pre-driver comprising:
a first component for setting an output of said switch pre-driver equal to a base power voltage level (vpwr);
a second component for setting said output of said switch pre-driver equal to a transition voltage level; and
a third component for setting said output of said switch pre-driver equal to a pre-determined voltage level during a high voltage mode.
16 . A switch pre-driver of claim 15 wherein said first component is disabled when Vpp 13 in is greater than said base power voltage level plus a threshold voltage (vpwr+Vtp).
17 . A switch pre-driver of claim 15 wherein said second component includes a weak PMOS that turns on when Vpp 13 in is raised above vpwr making vppgate follow Vpp 13 in.
18 . A switch pre-driver of claim 15 wherein said third component is activated when a high voltage is detected and the circuit enters a high voltage mode.
19 . A switch pre-driver of claim 15 wherein said third component includes a stack of NMOS transistors that draw a small keep-alive current.
20 . A switch pre-driver of claim 15 wherein said third component includes a strong NMOS transistor that controls vppgate output.