IP Library Granted Patent US 7,961,252
Granted Patent B2
US 7,961,252 · App. 11/590,515 · Granted Jun 14, 2011

Reduced memory and bandwidth motion adaptive video deinterlacing

Assignee: LSI Corporation
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Quick Facts
Patent No.
US 7,961,252
App. No.
11/590,515
Granted
Jun 14, 2011
Kind
B2
Abstract

A method for motion adaptive video deinterlacing is disclosed. The method generally includes the steps of (A) in a first plurality among a plurality of modes, generating a frame by deinterlacing a current field using a plurality of memory bandwidth configurations and (B) in a second plurality among the modes, generating the frame by deinterlacing the current field using a plurality of linestore configurations.

Claims (40)

1. A method of motion adaptive video deinterlacing, comprising the steps of:

(A) in a first plurality among a plurality of modes, generating a frame by deinterlacing a current field using a plurality of memory bandwidth configurations; and

(B) in a second plurality among said modes, generating said frame by deinterlacing said current field using a plurality of linestore configurations, wherein said memory bandwidth configurations comprise at least two of (i) a 1.5 luminance field bandwidth configuration (ii) a 2.5 luminance field bandwidth configuration, (iii) a 3.5 luminance field bandwidth configuration and (iv) a 4.5 luminance field bandwidth configuration.

2. The method according to claim 1 , wherein said deinterlacing comprises at least one of (i) a weave deinterlacing, (ii) a bob deinterlacing and (iii) a blend deinterlacing.

3. The method according to claim 1 , further comprising the step of:

checking if a pixel is stationary.

4. The method according to claim 1 , further comprising the step of:

checking if a pixel is on an edge within an image.

5. The method according to claim 1 , further comprising the step of:

changing between said memory bandwidth configurations.

6. The method according to claim 1 , wherein said memory bandwidth configurations comprise at least two of (i) a 3 luminance field bandwidth configuration (ii) a 4 luminance field bandwidth configuration and (iii) a 5 luminance field bandwidth configuration.

7. A method of motion adaptive video deinterlacing, comprising the steps of:

(A) generating a luminance result by checking for a first stationary condition in a first luminance channel of a current field;

(B) generating a first chrominance result by checking for a second stationary condition in a first chrominance channel of said current field;

(C) generating a second chrominance result by checking for a third stationary condition in a second chrominance channel of said current field; and

(D) generating a frame by deinterlacing said current field in response to said luminance result, said first chrominance result and said second chrominance result.

8. The method according to claim 7 , wherein step (D) comprises the sub-step of:

deinterlacing each of said luminance channel, said first chrominance channel and said second chrominance channel independently of each other.

9. The method according to claim 7 , wherein step (D) comprises the sub-step of:

checking for a fourth stationary condition in a history of said luminance channel.

10. The method according to claim 7 , wherein (i) a first delay exists between checking for said first stationary condition and checking for said second stationary condition and (ii) a second delay exists between checking for said second stationary condition and checking for said third stationary condition.

11. The method according to claim 7 , further comprising the step of:

detecting an edge in said first luminance channel to enhance said check for said first stationary condition.

12. The method according to claim 7 , wherein said luminance results comprises a plurality of sub-results for a respective plurality of pixels in said current field.

13. The method according to claim 7 , wherein said checking for said first stationary condition, said checking for said second stationary condition and said checking for said third stationary condition are independently disablable.

14. The method according to claim 7 , wherein a color format said first chrominance channel comprises at least two among (i) a 4:2:0 format, (ii) a 4:2:2 format and (iii) a 4:4:4 format.

15. The method according to claim 7 , further comprising the steps of:

generating an angle result by detecting an edge in said first luminance channel; and

interpolating in a direction said first chrominance channel using said angle result as a predicted chroma angle.

16. A method for reduced memory and bandwidth motion adaptive video deinterlacing, comprising the steps of:

(A) calculating a spatial activity for a first field and a second field, wherein said second field has an opposite-parity as said first field;

(B) adjusting a stationary check based on said spatial activity; and

(C) generating a frame by deinterlacing said first field based on said stationary check, wherein said spatial activity comprises a horizontal activity and a vertical activity.

17. The method according to claim 16 , wherein step (A) comprises the sub-step of:

calculating said spatial activity for both said first field and a second field, wherein said second field has an opposite-parity as said first field.

18. The method according to claim 16 , further comprising the step of:

calculating said stationary activity using at least one of (i) a local activity of a current pixel in said first field, (ii) a horizontal activity of a plurality of neighboring pixels horizontally surrounding said current pixel and (iii) a change between a second field and a third field of a plurality of co-located pixels proximate said current pixel.

19. A system comprising:

a memory configured to buffer a current field; and

a module configured to (i) in a first plurality among a plurality of modes, generate a frame by deinterlacing said current field using a plurality of memory bandwidth configurations and (ii) in a second plurality among said modes, generate said frame by deinterlacing said current field using a plurality of linestore configurations, wherein said memory bandwidth configurations comprise at least two of (i) a 1.5 luminance field bandwidth configuration (ii) a 2.5 luminance field bandwidth configuration, (iii) a 3.5 luminance field bandwidth configuration and (iv) a 4.5 luminance field bandwidth configuration.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
MERGER Recorded Apr 21, 2011
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 026163/0316 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2006
From: PAI, CHENG-YU; WINGER, LOWELL L.
To: LSI LOGIC CORPORATION
Reel/Frame 018483/0564 →
Continuity (2)
Continuation 11585345 · Oct 23, 2006
Related Publication 20080094501A1 · Apr 24, 2008