IP Library Granted Patent US 7,474,978
Granted Patent B2
US 7,474,978 · App. 11/591,760 · Granted Jan 6, 2009

High dynamic range optical receiver

Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,474,978
App. No.
11/591,760
Granted
Jan 6, 2009
Kind
B2
Abstract

An optical receiver having a photodetector, amplifier, feedback loop, and output circuit is disclosed. The photodetector generates a current between first and second nodes in response to being illuminated with light. The amplifier has an input connected to the first node and an output connected to a third node. The feedback path connects the third node to the first node, and includes a diode in series with a circuit element having an impedance greater than a predetermined value, the diode is connected between the first and fourth nodes. The output circuit is connected to the fourth node and provides an output signal to an external circuit. The output circuit can be configured to provide an output signal that is proportional to the logarithm of the intensity of the light that illuminates the photodetector.

Claims (22)

1. An optical receiver, comprising:

a photodetector configured to generate a current between first and second nodes in response to being illuminated with light, said photodetector being further configured to provide a parasitic capacitance between said first and second nodes;

an amplifier having an input connected to said first node and an output connected to a third node, said amplifier being characterized by a frequency range over which said amplifier is to operate in a stable manner;

a feedback path connecting said third node to said first node, said feedback path comprising a diode in series with a circuit element configured to have an impedance greater than a predetermined value, said diode being connected between first and fourth nodes;

an output circuit connected to said fourth node, said output circuit providing an output signal to an external circuit, wherein said predetermined value depends on said frequency range and said parasitic capacitance; and

a constant current source configured to cause a fixed current to flow through said transistor when said photodetector is not illuminated.

2. The optical receiver of claim 1 , wherein said circuit element is configured to have an impedance for current flowing from said third node to said first node that is less than the impedance of said circuit element for current flowing from said first node to said third node.

3. The optical receiver of claim 1 , wherein said circuit element comprises a transistor.

4. The optical receiver of claim 1 , wherein said amplifier comprises a transistor having a collector or drain connected to said third node and a base or gate connected to said first node.

5. The optical receiver of claim 1 , wherein said output circuit comprises a circuit configured to generate an output current in an external load, said output current having a magnitude related to the current flowing through said diode.

6. The optical receiver of claim 1 , wherein said output signal is proportional to the logarithm of the intensity of said light that illuminates said photodetector.

7. The optical receiver of claim 1 , wherein said photodetector comprises a photodiode.

8. The optical receiver of claim 1 , wherein said photodetector comprises a phototransistor.

9. A circuit for amplifying an input current flowing between first and second nodes, comprising:

an amplifier having an input connected to said first node and an output connected to a third node;

a feedback path connecting said third node to said first node, said feedback path comprising a diode in series with a circuit element having an impedance for current flowing from said third node to said first node that is less than the impedance of said circuit element for current flowing from said first node to said third node, said diode being connected between said first and fourth nodes;

an output circuit connected to said fourth node, said output circuit providing an output signal to an external circuit; and

a constant current source configured to cause a fixed current to flow through said transistor when said input current is zero.

10. The circuit of claim 9 , wherein said circuit element comprises a transistor.

11. The circuit of claim 9 , wherein said amplifier comprises a transistor having a collector or drain connected to said third node and a base or gate connected to said first node.

12. The circuit of claim 9 , wherein said output circuit comprises a circuit configured to generate an output current in an external load, said output current having a magnitude related to the current flowing through said diode.

13. The circuit of claim 9 , wherein said output signal is proportional to the logarithm of the intensity of said light that illuminates said photodetector.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0528 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2006
From: LUM, KOK KEONG RICHARD; CHEN, LEI
To: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
Reel/Frame 018619/0005 →
Continuity (1)
Related Publication 20080101803A1 · May 1, 2008