IP Library Granted Patent US 7,579,860
Granted Patent B2
US 7,579,860 · App. 11/592,411 · Granted Aug 25, 2009

Digital bandgap reference and method for producing reference signal

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Quick Facts
Patent No.
US 7,579,860
App. No.
11/592,411
Granted
Aug 25, 2009
Kind
B2
Abstract

A system and method ( 400 ) for producing a reference signal is provided. The method includes supplying ( 405 ) a first current to a diode, sampling ( 410 ) a first voltage across the diode, supplying ( 405 ) a second current to the diode, sampling ( 410 ) a second voltage across the diode, converting ( 415 ) the first voltage and the second voltage to a first digital value and a second digital value, and determining ( 420 ) a digital reference value from the first digital value and the second digital value. The first voltage is based on the first current, and the second voltage is based on the second current.

Claims (48)

1. A method for producing a reference signal, the method comprising the steps of:

supplying a first current to a diode;

sampling a first voltage across the diode to produce a first digital value, V BE (I1x), wherein the first voltage is based on the first current;

supplying a second current to the diode, wherein the first current and the second current have different current densities;

sampling a second voltage across the diode to produce a second digital value, V BE (Inx), wherein the second voltage is based on the second current;

computing a bandgap voltage, V k , of the diode from the first digital value and the second digital value as

V K =V BE ( I 1 x )+ G [V BE ( Inx )−V BE ( I 1 x )],

wherein G is a fixed gain;

determining a digital reference value, K, as a ratio of the bandgap voltage and a reference voltage; and

converting the digital reference value to an analog voltage for use in producing the reference signal.

2. A method according to claim 1 , wherein converting the digital reference value to the analog voltage comprises converting the digital reference value based on a reference potential.

3. A method according to claim 2 , further comprising generating the reference signal from the analog voltage.

4. A method according to claim 1 , wherein the first current is associated with a first current density and the second current is associated with a second current density.

5. A method according to claim 1 , wherein said step of supplying a first current comprises supplying the first current to the diode via a first output of a current generating circuit, the first output of the current generating circuit having a first current density associated therewith; and

wherein said step of supplying a second current comprises supplying the second current to the diode via a second output of the current generating circuit, the second output of the current generating circuit having a second current density associated therewith.

6. A method for producing a reference signal, the method comprising the steps of:

supplying a first current by a first current generating circuit to a first diode while supplying a second current by a second current generating circuit to a second diode, wherein the first current and the second current have different current densities;

sampling a first potential across the first diode to produce a first digital signal, V BE (I1x), while sampling a second potential across the second diode to produce a second digital signal, V BE (Inx);

producing a differential from the first and second potentials;

computing a bandgap voltage, V K , from the first and second digital signals as

V K =V BE ( I 1 x )+ G[ V BE ( Inx )−V BE ( I 1 x )],

wherein G is a fixed gain;

determining a digital reference value, K, as a ratio of the bandgap voltage and a reference voltage; and

converting the digital reference value to an analog voltage for use in producing the reference signal.

7. A method according to claim 6 , wherein converting the digital reference value to the analog voltage comprises converting the digital reference value based on a reference potential.

8. A method according to claim 7 , further comprising generating the reference signal from the analog voltage.

9. A method according to claim 6 , wherein said step of supplying a first current comprises supplying the first current to the first diode via a first output of the first current generating circuit while supplying the second current to the second diode via a first output of the second current generating circuit, the first output of the first current generating circuit having a first current density associated therewith, and the first output of the second current generating circuit having a second current density associated therewith.

10. A method according to claim 9 , further comprising supplying a third current by the first current generating circuit to the first diode via a second output of the first current generating circuit while supplying a fourth current by the second current generating circuit to the second diode via a second output of the second current generating circuit.

11. A method according to claim 6 , wherein said step of supplying a first current comprises supplying the first current to the first diode via a first output of the first current generating circuit while supplying the second current to the second diode via a first output of the second current generating circuit.

12. A method according to claim 11 , further comprising supplying a third current by the first current generating circuit to the first diode via a second output of the first current generating circuit while supplying a fourth current by the second current generating circuit to the second diode via a second output of the second current generating circuit.

13. A circuit for generating a reference signal, the circuit comprising:

a first diode configured to receive at least a first current and a second current from a first current generating circuit, to produce a first voltage drop across the first diode in response to the first current, and to produce a second voltage drop across the first diode in response to the second current;

an analog to digital converter (ADC) coupled to said first diode, said ADC configured to provide a first digital value, V BE (I1x), based on said first voltage drop and a second digital value, V BE (Inx), based on said second voltage drop; and

a processing circuit configured to compute a bandgap voltage, V K ,from the first digital value and the second digital value as

V K =V BE ( I 1 x )+ G [V BE ( Inx )−V BE ( I 1 x )],

wherein G is a fixed gain, and to determine a digital reference value, K, as a ratio of the bandgap voltage and a reference voltage; and

a digital to analog converter (DAC) coupled to said processing circuit, said DAC configured to convert the digital reference value to an analog voltage for use in generating the reference signal.

14. A circuit according to claim 13 , wherein said first current is associated with a first current density and said second current is associated with a second current density.

15. A circuit according to claim 13 , further comprising the first current generating circuit, which includes a current mirror having first and second outputs, said first output of said current mirror having a first current density associated therewith, a second output of said current mirror having a second current density associated therewith, said current mirror configured to supply said first current via said first output of said current mirror and further configured to supply said second current via said second output of said current mirror.

16. A circuit according to claim 13 , further comprising the first current generating circuit, which includes a current mirror having a plurality of outputs, said current mirror configured to:

supply said first current based on a first combination of said plurality of outputs having a first current density associated therewith; and

supply said second current based on a second combination of said plurality of outputs having a second current density associated therewith.

17. A circuit according to claim 16 , wherein said current mirror is further configured to rotate supplying a plurality of currents to said first diode, each of said plurality of currents based on a different combination of said plurality of outputs, and each of said plurality of currents having a current density associated therewith.

18. A circuit according to claim 13 , further comprising:

a second diode configured to receive at least a third current and a fourth current from a second current generating circuit, to produce a third voltage drop across the second diode in response to the third current, and to produce a fourth voltage drop across the second diode in response to the fourth current; and

wherein the ADC is coupled to said second diode, said ADC configured to provide a third digital value based on said third voltage drop and a fourth digital value based on said fourth voltage drop; and

wherein said processing circuit is further configured to compute the bandgap voltage from the first digital value, the second digital value, the third digital value, and the fourth digital value.

19. A circuit according to claim 13 further comprising a reference potential supply coupled to each of said ADC and said DAC, said reference potential supply being inaccurate.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052459/0656 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0854 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Feb 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2006
From: DEKEN, RICHARD
To: FREESCALE SEMICONDUCTOR, INC.
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