IP Library Granted Patent US 7,615,823
Granted Patent B2
US 7,615,823 · App. 11/593,013 · Granted Nov 10, 2009

SOI substrate and method of manufacturing the same

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Quick Facts
Patent No.
US 7,615,823
App. No.
11/593,013
Granted
Nov 10, 2009
Kind
B2
Abstract

The SOI substrate includes a supporting substrate, an insulating layer (first insulating layer), another insulating layer (second insulating layer), and a silicon layer (silicon active layer). On a surface of the supporting substrate, which is the surface on the side of the silicon layer, the first insulating layer is provided. On a surface of the silicon layer, which is the surface on the side of the supporting substrate, the second insulating layer is provided. The supporting substrate and the silicon layer are adhered to each other, so that the interface between the first and the second insulating layers constitutes an adhesion plane. The adhesion plane performs as a gettering site in the SOI substrate.

Claims (20)

1. A SOI substrate including a supporting substrate and a silicon layer adhered to each other, comprising:

a first insulating layer provided on a surface of said supporting substrate facing said silicon layer; and

a second insulating layer provided on a surface of said silicon layer facing said supporting substrate,

wherein said supporting substrate and said silicon layer are adhered to each other so that said first insulating layer directly contacts said second insulating layer forming an interface between said first and said second insulating layers constituting an adhesion plane, and said adhesion plane performs as a gettering site.

2. The SOI substrate according to claim 1 , wherein said second insulating layer is formed in a thickness that allows a heavy metal in said silicon layer to be diffused through said second insulating layer, so as to reach said adhesion plane.

3. The SOI substrate according to claim 1 , wherein said second insulating layer is thinner than said first insulating layer.

4. The SOI substrate according to claim 1 , wherein 0<d≦20 nm is satisfied, when d denotes a thickness of said second insulating layer.

5. The SOI substrate according to claim 4 , wherein said d satisfies 0.4 nm≦d≦20 nm.

6. The SOI substrate according to claim 1 , wherein said supporting substrate is a silicon substrate.

7. The SOI substrate according to claim 1 , wherein said second insulating layer is formed in a thin film formation process.

8. The SOI substrate according to claim 1 , wherein said adhesion plane includes irregular crystals.

9. A method of manufacturing a SOI substrate, comprising:

forming a first insulating layer on a supporting substrate;

forming a second insulating layer on a silicon layer; and

adhering said supporting substrate and said silicon layer to each other so that said first insulating layer directly contacts said second insulting layer thereby forming an interface between said first and said second insulating layers constituting an adhesion plane,

wherein said adhesion plane performs as a gettering site in said SOI substrate.

10. The method according to claim 9 , wherein said second insulating layer is formed in a thin film formation process.

11. The method according to claim 10 , wherein said second insulating layer is formed by thermal oxidation.

12. The method according to claim 9 , wherein said forming of said second insulating layer includes removing a natural oxide layer formed on said silicon layer, before forming said second insulating layer.

13. The method according to claim 9 , wherein said adhesion plane includes irregular crystals.

Assignments (2)
CHANGE OF NAME Recorded Nov 5, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025315/0201 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2006
From: TAKAO, NORIYUKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 018548/0845 →