Multiple power mode amplifier with bias modulation option and without bypass switches
View Patent ↗A multiple power mode amplifier provides a low and a high power mode without using switches. This amplifier may be used in radio frequency (RF) applications such as mobile telephones, pagers, portable digital assistants, and wireless e-mail devices. In the low power mode, the power consumption of the amplifier is reduced, which will increase operation time, especially important for battery-operated devices. In one implementation, the amplifier includes a number of impedance matching network units ( 130, 140, 150 , and 160 ), impedance transformer ( 170 ), and a power stage ( 120 ). An implementation provides further power consumption savings by modulating a bias of an amplifier stage.
1. An integrated circuit comprising:
a first transistor coupled between an input node and a first node;
a matching circuit block coupled between the first node and a second node;
the second transistor coupled between the second node and a third node;
a first circuit block coupled between the third node and a fourth node;
a second circuit block coupled between the fourth node and a fifth node;
a third transistor coupled between the fifth node and a sixth node;
a third circuit block coupled between the sixth node and a seventh node; and
a fourth circuit block coupled between the fourth node and the seventh node, wherein in a first mode of operation, a signal provided at the input node passes through the first transistor, matching circuit block, second transistor, first circuit block, and fourth circuit block, and
in a second mode of operation, a signal provided at the input node passes through the first transistor, matching circuit block, second transistor, first circuit block, second circuit block, third transistor, third circuit block.
2. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
an inductance device coupled between the fourth node and a eighth node; and
a capacitor coupled between the eighth node and seventh node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
3. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
a capacitor coupled between the fourth node and a eighth node; and
an inductance device coupled between the eighth node and the seventh node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
4. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
a first capacitor coupled between the fourth node and a eighth node;
an inductance device coupled between the eighth node and the seventh node; and
a second capacitor coupled between the eighth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
5. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
an inductance device coupled between the fourth node and a eighth node;
a first capacitor coupled between the eighth node and the seventh node; and
a second capacitor coupled between the eighth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
6. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
an inductance device coupled between the fourth node and the seventh node; and
a capacitor coupled between the fourth node and the seventh node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
7. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
an inductance device coupled between the fourth node and the seventh node;
a first capacitor coupled between the fourth node and a reference voltage level; and
a second capacitor coupled between the seventh node and the reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
8. The integrated circuit of claim 1 wherein the fourth circuit block comprises:
an inductance device, coupled between the second node and the fifth node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
9. The integrated circuit of claim 1 wherein the third circuit block comprises:
an inductance device coupled between the sixth node and the seventh node; and
a capacitor coupled between the sixth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
10. The integrated circuit of claim 1 wherein the third circuit block comprises:
a first capacitor coupled between the sixth node and a reference voltage level;
a first inductance device coupled between the sixth node and the reference voltage level; and
a second inductance device coupled between the sixth node and the seventh node, wherein the first inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide, and the second inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
11. The integrated circuit of claim 1 wherein the third circuit block comprises:
a first inductance device coupled between the sixth node and a reference voltage level;
a first capacitor coupled between the sixth node and the reference voltage level;
a second inductance device coupled between the sixth node and the seventh node; and
a second capacitor coupled between the seventh node and the reference voltage level, wherein the first inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide, and the second inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
12. The integrated circuit of claim 1 wherein the third circuit block comprises:
a first inductance device coupled between the sixth node and the reference voltage level;
a second inductance device coupled between the sixth node and the seventh node; and
a first capacitor coupled between the seventh node and the reference voltage level, wherein the first inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide, and the second inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
13. The integrated circuit of claim 1 wherein the third circuit block comprises:
a first capacitor coupled between the sixth node and a reference voltage level;
a first inductance device coupled between the sixth node and the seventh node; and
a second inductance device coupled between the seventh node and the reference voltage level, wherein the first inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide, and the second inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
14. The integrated circuit of claim 1 wherein the first circuit block comprises a first capacitor coupled between the third node and a fourth node, and the second circuit block comprises a second capacitor coupled between the fourth node and a fifth node.
15. The integrated circuit of claim 1 wherein the first circuit block comprises no passive elements coupled between the third node and a fourth node, and the second circuit block comprises a second capacitor coupled between the fourth node and a fifth node.
16. The integrated circuit of claim 14 wherein the first circuit block further comprises an inductance device and a third capacitor, in series, coupled between the third node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, micro strip line, strip line, coaxial cable, or coplanar waveguide.
17. The integrated circuit of claim 16 wherein the inductance device is further coupled to a supply voltage level.
18. The integrated circuit of claim 14 wherein the second circuit block further comprises an inductance device coupled between the fourth, node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
19. The integrated circuit of claim 16 wherein the second circuit block further comprises an inductance device coupled between the fourth node and the reference voltage level.
20. The integrated circuit of claim 14 wherein the second circuit block further comprises an inductance device coupled between the fifth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
21. The integrated circuit of claim 14 wherein the second circuit block further comprises a third capacitor coupled between the fourth node and a reference voltage level.
22. The integrated circuit of claim 1 wherein the first circuit block comprises an inductance device coupled between the third node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
23. The integrated circuit of claim 1 wherein the second circuit block comprises:
a first capacitor coupled between the fourth node and a eighth node;
an inductance device coupled between the eighth node and a reference voltage level; and
a second capacitor coupled between the eighth node and the fifth node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
24. The integrated circuit of claim 1 further comprising;
a voltage control circuit coupled to the third transistor, wherein the voltage control circuit, in response to a mode control voltage, provides a control signal to the third transistor to place the third transistor in the on state or the off state.
25. The integrated circuit of claim 24 wherein the voltage control circuit comprises a fourth transistor coupled between the third transistor and a reference voltage level, wherein an electrode of the fourth transistor is coupled to a voltage control line.
26. The integrated circuit of claim 24 wherein the voltage control circuit comprises:
a fourth transistor, coupled between the third transistor and a reference voltage level; and
a fifth transistor, coupled between a supply voltage line and a reference voltage level,
wherein an electrode of the fourth transistor is connected to a point coupling the fifth transistor and the supply voltage line, and
an electrode of the fifth transistor is coupled to a voltage control line.
27. The integrated circuit of claim 24 wherein the voltage control circuit comprises:
a fourth transistor, coupled between the third transistor and a reference voltage level; and
a fifth transistor, coupled between a supply voltage line and an electrode of the fourth transistor,
wherein an electrode of the fifth transistor is coupled to a voltage control line.
28. The integrated circuit of claim 1 further comprising
a voltage control circuit coupled to the first transistor or the second transistor, wherein the voltage control circuit, in response to a mode control voltage, provides a signal to the first transistor or the second transistor to adjust a bias of the first transistor or the second transistor so during the first mode of operation the bias of the first transistor or the second transistor is reduced compared to the bias of the first transistor or the second transistor during the second mode of operation.
29. The integrated circuit of claim 28 wherein the voltage control circuit comprises a fourth transistor coupled to the first transistor or the second transistor through a resistance and coupled to a reference voltage level through a resistance, wherein an electrode of the fourth transistor is coupled to a voltage control line.
30. The integrated circuit of claim 28 wherein the voltage control circuit comprises a fourth transistor coupled to the first transistor or the second transistor and coupled to a reference voltage level through a resistance, wherein an electrode of the fourth transistor is coupled to a voltage control line.
31. The integrated circuit of claim 28 wherein the voltage control circuit comprises a fourth transistor, coupled to the first transistor or the second transistor through a resistance and coupled to a reference voltage level, wherein an electrode of the fourth transistor is coupled to a voltage control line.
32. The integrated circuit of claim 28 wherein the voltage control circuit comprises:
a fourth transistor;
a resistance; and
one or more level shifting diodes, connected in series with the resistance,
wherein the resistance and the one or more level shifting diodes, in series, are coupled to the first transistor or the second transistor,
the fourth transistor is coupled to the resistance and the one or more level shifting diodes and coupled to a reference voltage level, and
an electrode of the fourth transistor is coupled to a voltage control line.
33. The integrated circuit of claim 1 wherein the first transistor, second transistor, or third transistor is a bipolar junction transistor, a heterojunction bipolar transistor, a field effect transistor, a complementary metal-oxide semiconductor transistor, a metal-oxide semiconductor transistor, a p-type metal-oxide semiconductor transistor, a n-type metal-oxide semiconductor transistor, a high electron mobility transistor, or a metal semiconductor field effect transistor.
34. The integrated circuit of claim 1 further comprising a fifth circuit block coupled between the seventh node and a eighth node.
35. The integrated circuit of claim 34 wherein the fifth circuit block comprises a capacitor coupled between the seventh node and eighth node.
36. The integrated circuit of claim 34 wherein the fifth circuit block comprises:
an inductance device coupled between the seventh node and eighth node; and
a capacitor coupled between the eighth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
37. The integrated circuit of claim 34 wherein the fifth circuit block comprises:
an inductance device coupled between the seventh node and ninth node;
a first capacitor coupled between the ninth node and a reference voltage level; and
a second capacitor coupled between the ninth node and the eighth node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
38. The integrated circuit of claim 34 wherein the fifth circuit block comprises an inductance device and capacitor, in series, coupled between the seventh node and eighth node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
39. The integrated circuit of claim 34 wherein the fifth circuit block comprises:
a first capacitor coupled between the seventh node and a reference voltage level;
an inductance device coupled between the seventh node and eighth node; and
a second capacitor coupled between the eighth node and a reference voltage level, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.
40. The integrated circuit of claim 34 wherein the fifth circuit block comprises:
a capacitor coupled between the seventh node and a reference voltage level;
an inductance device coupled between the seventh node and eighth node, wherein the inductance device comprises at least one of an inductor, wire bonding, transmission line, microstrip line, strip line, coaxial cable, or coplanar waveguide.