Method to reduce junction leakage through partial regrowth with ultrafast anneal and structures formed thereby
Methods and associated structures of forming a microelectronic device are described. Those methods may include creating an amorphous region in source/drain regions of a substrate by ion implantation with an electrically neutral dopant, annealing with a first anneal that removes defects without completely re-crystallizing the amophous region, ion implantation of electrically active dopant to a depth shallower than the remaining amorphous region, followed by a second anneal.
1. A method of forming a device comprising:
amorphizing source/drain regions in a substrate by implanting the source/drain regions with an electrically neutral ion species, wherein the electrically neutral species comprises an ion species that is identical to the substrate, and wherein a depth of an amorphized region that is formed is deeper than a depth of the source drain region;
annealing the source/drain regions at a first temperature; and
annealing the source drain regions at a second temperature, wherein annealing comprises annealing by utilizing a rapid thermal annealing process wherein the rapid thermal annealing process comprises a duration of time of less than about one second,
wherein the first temperature is lower than the second temperature.
2. The method of claim 1 further comprising wherein the first temperature comprises between about 850 degrees Celsius to about 950 degrees Celsius.
3. The method of claim 1 further comprising wherein the second temperature comprises between about 700 degrees Celsius to about 1050 degrees Celsius.
4. The method of claim 1 wherein the duration of time comprises about 0.1 milliseconds to about 15 milliseconds.
5. The method of claim 1 further comprising recrystallizing a portion of an interface region.
6. The method of claim 5 wherein the portion comprises a portion adjacent to the source/drain regions and a spacer.
7. The method of claim 5 wherein re-crystallizing a portion comprises reducing a thickness of the interface region by up to about 50 percent.
8. The method of claim 5 wherein annealing the source/drain regions at a first temperature further comprises subsequently ion implanting an electrically active dopant to a depth that is shallower than a depth of a partially re-crystallized source/drain region.