Semiconductor integrated circuit and design method thereof
View Patent ↗In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
1. A semiconductor integrated circuit having a first ring power supply, a second ring power supply, a first power supply source wire, a second power supply source wire, a first power supply source IO terminal, and a second power supply source IO terminal, wherein
the first ring power supply and the second ring power supply belong to a plurality of wire layers,
the first ring power supply is connected with the first power supply source wire in at least one of the plurality of wire layers,
the second ring power supply is connected with the second power supply source wire in at least one of the plurality of wire layers,
the first power supply source IO terminal is connected with the first power supply source wire,
the second power supply source IO terminal is connected with the second power supply source wire,
the first power supply source IO terminal and the second power supply source IO terminal in a pair are disposed outside the first ring power supply and the second ring power supply in a pair when viewed in plan,
the wire layers of the first power supply source wire and the second power supply source wire are the same wire layer,
the first ring power supply has a plurality of corners at each of which a wire extending in a first direction intersects a wire extending in a second direction perpendicular to the first direction when viewed in plan,
the first ring power supply is connected with the first power supply source wire at a plurality of connecting points, and
at least one of the connecting points are at one of the plurality of corners.
2. The semiconductor integrated circuit of claim 1 , wherein the second ring power supply has a plurality of corners at each of which a wire extending in a first direction intersects a wire extending in a second direction perpendicular to the first direction when viewed in plan,
the second ring power supply is connected with the second power supply source wire at a plurality of connecting points, and
at least one of the connecting points are at one of the plurality of corners.
3. The semiconductor integrated circuit of claim 1 , wherein at a part in which the first power supply source wire crosses the second ring power supply when viewed in plan, a wire layer of the second ring power supply is different from a wire layer of the first power supply source wire.
4. A semiconductor integrated circuit having a first ring power supply, a second ring power supply, a first power supply source wire, a second power supply source wire, a first power supply source IO terminal, and a second power supply source IO terminal, wherein
the first ring power supply and the second ring power supply belong to a plurality of wire layers,
the first ring power supply is connected with the first power supply source wire in at least one of the plurality of wire layers,
the second ring power supply is connected with the second power supply source wire in at least one of the plurality of wire layers,
the first power supply source IO terminal is connected with the first power supply source wire,
the second power supply source IO terminal is connected with the second power supply source wire,
the first power supply source IO terminal and the second power supply source IO terminal in a pair are disposed outside the first ring power supply and the second ring power supply in a pair when viewed in plan,
the wire layers of the first power supply source wire and the second power supply source wire are the same wire layer,
the wire layer in which the first ring power supply is connected with the first power supply source wire and the wire layer in which the second ring power supply is connected with the second power supply source wire are a top wire layer of the plurality of wire layers,
the first ring power supply has a plurality of corners at each of which a wire extending in a first direction intersects a wire extending in a second direction perpendicular to the first direction when viewed in plan,
the first ring power supply is connected with the first power supply source wire at a plurality of connecting points, and
at least one of the connecting points are at one of the plurality of corners.
5. The semiconductor integrated circuit of claim 4 , wherein the second ring power supply has a plurality of corners at each of which a wire extending in a first direction intersects a wire extending in a second direction perpendicular to the first direction when viewed in plan,
the second ring power supply is connected with the second power supply source wire at a plurality of connecting points, and
at least one of the connecting points are at one of the plurality of corners.
6. The semiconductor integrated circuit of claim 1 , wherein the first ring power supply and the second ring power supply belong to a plurality of different wire layers.
7. The semiconductor integrated circuit of claim 4 , wherein at a part in which the first power supply source wire crosses the second ring power supply when viewed in plan, a wire layer of the second ring power supply is different from a wire layer of the first power supply source wire.
8. The semiconductor integrated circuit of claim 4 , wherein the first ring power supply and the second ring power supply belong to a plurality of different wire layers.