Systems and methods of RF power transmission, modulation, and amplification, including output stage protection circuitry
Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
1. An apparatus comprising:
a first module configured to generate a plurality of in-phase (I) and quadrature (Q) control signals;
a second module configured to generate a plurality of substantially constant envelope signals using said plurality of I and Q control signals and a frequency reference signal;
a power amplifier configured to amplify and combine said plurality of substantially constant envelope signals to create an output signal; and
an output stage protection module configured to control an output of said power amplifier to be below a threshold, wherein said output stage protection module comprises circuitry configured to control a bias of an input stage of said power amplifier based on said plurality of I and Q control signals.
2. The apparatus of claim 1 , wherein said output stage protection module comprises VSWR (Voltage-Standing-Wave-Ratio) protection circuitry.
3. The apparatus of claim 2 , wherein said VSWR protection circuitry comprises:
circuitry operable to enable said power amplifier to deliver maximum output power at one or more VSWR levels.
4. The apparatus of claim 2 , wherein said VSWR protection circuitry comprises:
circuitry operable to enable said power amplifier to operate at one or more VSWR levels without damaging said power amplifier.
5. The apparatus of claim 2 , wherein said VSWR protection circuitry comprises:
circuitry operable to prevent an output stage of said power amplifier from entering thermal shutdown or device breakdown.
6. The apparatus of claim 1 , wherein said output stage protection module is coupled directly or indirectly to said output of said power amplifier.
7. The apparatus of claim 1 , wherein said output stage protection module further comprises:
circuitry operable to monitor said output of said power amplifier; and
circuitry operable to decrease a gain of said power amplifier when a signal level at said output of said power amplifier is above said threshold.
8. The apparatus of claim 7 , wherein said power amplifier comprises a plurality of amplification stages, wherein said circuitry operable to decrease said gain of said power amplifier comprises:
circuitry operable to decrease a gain of one or more of said plurality of amplification stages when said signal level at said output of said power amplifier is above said threshold.
9. The apparatus of claim 7 , wherein said power amplifier comprises one or more amplification stages, wherein said one or more amplification stages comprise one or more of a pre-driver stage, a driver stage and a power amplifier stage, wherein said circuitry operable to decrease said gain of said power amplifier comprises:
circuitry operable to decrease a gain of one or more of said amplification stages when said signal level at said output of said power amplifier is above said threshold, wherein a gain of at least one of said pre-driver stage, said driver stage, and said power amplifier stage is reduced as needed to reduce said signal level at said output of said power amplifier below said threshold.
10. The apparatus of claim 1 , further comprising:
power detection circuitry coupled to said output of said power amplifier.
11. The apparatus of claim 10 , wherein said power detection circuitry is directly or indirectly coupled to said output of said power amplifier.
12. The apparatus of claim 10 , wherein said power detection circuitry comprises:
circuitry operable to generate a power level signal representing an output power of said power amplifier.
13. The apparatus of claim 12 , further comprising:
a control module configured to regulate output power of said power amplifier based on said power level signal.
14. A method comprising:
generating a plurality of in-phase (I) and quadtrature (Q) control signals;
generating a plurality of substantially constant envelope signals using said plurality of I and Q control signals and a frequency reference signal;
amplifying and combining said plurality of substantially constant envelope signals using a power amplifier to create an output signal; and
controlling an output of said power amplifier to be below a threshold, wherein said controlling comprises controlling a bias of an input stage of said power amplifier based on said plurality of I and Q controls signals.
15. The method of claim 14 , wherein said controlling comprises:
enabling said power amplifier to deliver maximum output power at one or more VSWR (Voltage-Standing-Wave-Ratio) levels.
16. The method of claim 14 , wherein said controlling comprises:
enabling said power amplifier to operate at one or more VSWR (Voltage-Standing-Wave-Ratio) levels without damaging said power amplifier.
17. The method of claim 14 , wherein said controlling comprises:
preventing an output stage of said power amplifier from entering thermal shutdown or device breakdown.
18. The method of claim 14 , wherein said controlling comprises:
monitoring said output of said power amplifier; and
decreasing a gain of said power amplifier when a signal level at said output of said power amplifier is above said threshold.
19. The method of claim 18 , wherein said power amplifier comprises a plurality of amplification stages, wherein said decreasing comprises:
decreasing a gain of one or more of said plurality of amplification stages when said signal level at said output of said power amplifier is above said threshold.
20. The method of claim 18 , wherein said power amplifier comprises one or more amplification stages, wherein said one or more amplification stages comprise one or more of a pre-driver stage, a driver stage and a power amplifier stage, wherein said decreasing comprises:
decreasing a gain of one or more of said amplification stages when said signal level at said output of said power amplifier is above said threshold, wherein a gain of at least one of said pre-driver stage, said driver stage, and said power amplifier stage is reduced as needed to reduce said signal level at said output of said power amplifier below said threshold.
21. The method of claim 14 , further comprising:
generating a power level signal representing an output power of said power amplifier; and
regulating said output power of said power amplifier based on said power level signal.