IP Library Granted Patent US 7,763,937
Granted Patent B2
US 7,763,937 · App. 11/601,127 · Granted Jul 27, 2010

Variable resurf semiconductor device and method

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Quick Facts
Patent No.
US 7,763,937
App. No.
11/601,127
Granted
Jul 27, 2010
Kind
B2
Abstract

Methods and apparatus are provided for semiconductor device ( 60, 95, 100, 106 ). The semiconductor device ( 60, 95, 100, 106 ), comprises a first region ( 64, 70 ) of a first conductivity type extending to a first surface ( 80 ), a second region ( 66 ) of a second, opposite, conductivity type forming with the first region ( 70 ) a first PN junction ( 65 ) extending to the first surface ( 80 ), a contact region ( 68 ) of the second conductivity type in the second region ( 66 ) at the first surface ( 80 ) and spaced apart from the first PN junction ( 65 ) by a first distance (L DS ), and a third region ( 82, 96 - 98, 108 ) of the first conductivity type and of a second length (L BR ), underlying the second region ( 66 ) and forming a second PN junction ( 63 ) therewith spaced apart from the first surface ( 80 ) and located closer to the first PN junction ( 65 ) than to the contact region ( 68 ). The breakdown voltage is enhanced without degrading other useful properties of the device ( 60, 95, 100, 106 ).

Claims (36)

1. A semiconductor device, comprising:

a first region of a first conductivity type having a first portion extending to a first surface and a second portion spaced apart from the first surface;

a second region of a second, opposite, conductivity type forming a first PN junction extending to the first surface with the first portion of the first region and a second PN junction with the second portion of the first region;

a contact region of the second conductivity type in the second region at the first surface, spaced apart from the first PN junction by a first distance (L DS ); and

a third region of the first conductivity type and of a second length (L BR ), underlying the second region and forming a third PN junction therewith and spaced apart from the first surface, wherein the third region has a portion located closer to the first PN junction than to the contact region, wherein the third region is non-uniformly doped along the second length.

2. The device of claim 1 , wherein the first length (L Ds ) is greater than the second length (L BR ).

3. The device of claim 2 , wherein the second length (L BR ) and the first length (L DS ) have a ratio (L BR :L DS ) in the range of about 1:10 to 5:10.

4. The device of claim 3 , wherein the second length (L BR ) and the first length (L DS ) have a ratio (L BR :L DS ) in the range of about 1.5:10 to 4:10.

5. The device of claim 4 , wherein the second length (L BR ) and the first length (L DS ) have a ratio (L BR :L DS ) in the range of about 2:10 to 3:10.

6. The device of claim 1 , wherein an average doping concentration in the third region is greater than an average doping concentration in the second portion of the first region.

7. The device of claim 6 , wherein the average doping concentration in the third region exceeds the average doping concentration in the second portion of the first region by a ratio in a range of about 2:1 to 50:1.

8. The device of claim 1 , wherein an average doping concentration in the first portion of the first region is greater than an average doping concentration in the third region.

9. The device of claim 8 , wherein the average doping concentration in the first portion of the first region exceeds the average doping concentration in the third region by a ratio in the range of about 2:1 to 100:1.

10. A semiconductor device, comprising:

a first region of a first conductivity type having a first portion extending to a first surface and a second portion spaced apart from the first surface;

a second region of a second, opposite, conductivity type forming a first PN junction extending to the first surface with the first portion of the first region and a second PN junction with the second portion of the first region;

a contact region of the second conductivity type in the second region at the first surface, spaced apart from the first PN junction by a first distance (L DS ); and

a third region of the first conductivity type and of a second length (L BR ), underlying the second region and forming a third PN junction therewith and spaced apart from the first surface, wherein the third region has a portion located closer to the first PN junction than to the contact region, and wherein the third region has a decreasing number of impurities of the first conductivity type as a function of distance toward the contact region.

11. A method for forming a semiconductor device, comprising:

providing a first semiconductor region of a first conductivity type and doping concentrations and having a first surface, then in any order;

forming one or more second semiconductor regions of the first conductivity type and second doping concentrations in the first region, spaced apart from the first surface and having a first overall lateral extent (L BR ) substantially parallel to the first surface, wherein the one or more second semiconductor regions are non-uniformly doped along the first overall lateral extent;

forming a third semiconductor region of a second opposite conductivity type and third doping concentration extending from the first surface to the one or more second regions and having a lateral extent (L DS ) greater than the first lateral extent (L BR ) and forming a first PN junction with the first region and second PN junctions with the one or more second regions;

providing a fourth semiconductor region of the second conductivity type and fourth doping concentration proximate the first surface in ohmic contact with the third region and spaced apart from the one or more second regions; and

providing a fifth semiconductor region of the first conductivity type and fifth doping concentration proximate the first surface ohmically coupled to the one or more second regions and spaced apart from the third region.

12. The method of claim 11 , wherein the one or more second regions have a doping concentration that exceeds a doping concentration of a first portion of the first region that underlies the third region.

13. The method of claim 12 , wherein the doping concentration of at least part of the one or more second regions has a ratio to the doping concentration of the first portion the first region in the range of about 2:1 to 50:1.

14. The method of claim 11 , wherein a second portion of the first region that extends to the first surface has a doping concentration that exceeds the doping concentration of at least some of the one or more second regions.

15. The method of claim 14 , the second portion of the first region has a doping concentration that exceeds the doping concentration of at least some of the one or more second regions by a ratio in the range of 2:1 to 100:1.

16. A semiconductor device, comprising:

a first region of a first conductivity type extending to a first surface;

a second region of the first conductivity type ohmically coupled to the first region and spaced apart from the first surface;

a third region of a second, opposite, conductivity type located between the second region and the first surface and forming a first PN junction with the first region and a second PN junction with the second region, and having a lateral extent (L DS ) extending from the first PN junction substantially parallel to the second PN junction; and

one or more fourth regions of the first conductivity type ohmically coupled to the first region, underlying and forming third PN junctions with the third region, and having an overall lateral extent (L BR ) substantially parallel to the first surface that is less than L DS , wherein the one or more fourth regions are non-uniformly doped along the overall lateral extent.

17. The device of claim 16 , wherein a first of the one or more fourth regions is located substantially proximate the first PN junction.

18. The device of claim 16 , wherein the ratio L BR :L DS is in the range of 1:10 to 5:10.

19. The device of claim 18 wherein the ratio L BR :L DS is in the range of 2:10 to 3:10.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →