Continuous-time delta-sigma analog digital converter
The invention relates to a continuous-time delta-sigma analog digital converter ( 10 ) for converting an analog input signal (IN) to a digital output signal (OUT), comprising an analog filter ( 20 ), which filters the analog input signal, a quantifier ( 30 ) cycled by a clock signal (CLK), which quantifier quantifies the filtered analog signal transmitted by the analog filter ( 20 ) to generate the digital output signal, and a feedback device ( 40 ) with at last one digital analog converter, which transmits at least one analog feedback signal based on the digital output signal (OUT) to the analog filter ( 20 ). To simplify the feedback without adversely affecting the converter stability and power consumption, provision is made, according to the invention, for the feedback device ( 40 ) for generating a feedback signal corresponding to the differentiated output signal of the quantifier, to comprise two digital analog converters ( 44 - 1, 44 - 2 ) to which the digital output signal (OUT) of the quantifier ( 30 ) is transmitted via a delay stage ( 42 - 1, 42 - 2 ) with different delays, and hose analog output signals are transmitted to an analog subtractor ( 24 - 3 ).
1. A continuous-time delta-sigma analog digital converter for converting an analog input signal (IN) to a digital output signal (OUT), comprising:
an analog filter ( 20 ) which filters the analog input signal,
a quantifier ( 30 ) cycled by a clock signal (CLK), which quantifier quantifies the filtered analog signal transmitted by analog filter ( 20 ) for generating the digital output signal, and
a feedback device ( 40 ) with at least one digital analog converter, which device transmits at least one analog feedback signal to analog filter ( 20 ) on the basis of the digital output signal (OUT),
characterized in that the feedback device ( 40 ) comprises a first digital analog converters ( 44 - 1 ) for generating a feedback signal corresponding to a delayed output signal of the quantifier, to which converters the digital output signal (OUT) of the quantifier ( 30 ) is transmitted via a first delay element ( 42 - 1 ) with a first delays, wherein a second delay element ( 42 - 2 ) is provided, to which the digital output signal delayed by the first delay is transmitted, and which supplies this signal delayed by a second delay at the input of a second digital analog converter ( 44 - 2 ), wherein the analog output signals of the two digital analog converters ( 44 - 1 , 44 - 2 ) are transmitted to an analog subtractor ( 24 - 3 ) for generating a feedback signal corresponding to a differentiated output signal of the quantifier ( 30 ).
2. The converter according to claim 1 , wherein the feedback signal corresponding to the differentiated output signal of the quantifier is transmitted to an integrator ( 22 - 3 ) of the analog filter ( 20 ).
3. The converter according to claim 1 , wherein the output signal of the quantizer ( 30 ) delayed by the first delay is transmitted to at least one further digital analog converter ( 46 ) of the feedback device ( 40 ).
4. The converter according to claim 1 , wherein the first delay and the second delay are each equal to half a cycle period of the clock signal (CLK).
5. The converter according to claim 1 , wherein the delay elements ( 42 - 1 , 42 - 2 ) are each designed as digital signal accumulators cycled by the clock signal (CLK).
6. The converter according to claim 1 , wherein the analog output signals of the two digital analog converters ( 44 - 1 , 44 - 2 ) are current signals.
7. The converter according to claim 1 , wherein the quantifier ( 30 ) has a plurality of quantification stages.
8. The converter according to claim 1 , wherein the digital output signal (OUT) of the quantifier ( 30 ) has a thermometer coding.
9. A method for continuous-time delta-sigma analog digital conversion for converting an analog input signal (IN) to a digital output signal (OUT), comprising:
an analog filtering ( 20 ) of the input signal,
a quantification ( 30 ) of the filtered analog signal cycled by a clock signal for generating the digital output signal (OUT), and
a feedback ( 40 ) comprising at least one digital analog conversion for supplying at least one analog feedback signal on the basis of the digital output signal during analog filtering,
characterized in that the feedback ( 40 ) for generating a feedback signal corresponding to a delayed output signal of the quantification ( 30 ) comprises a first digital analog conversions ( 44 - 1 ), wherein the digital output signal (OUT) of the quantification ( 30 ) is subject with a first delay to the first digital analog conversions ( 44 - 1 ), wherein the digital output signal delayed by the first delay further is subject with a second delay to a second digital analog conversion ( 44 - 2 ) and the two digital analog converted signals are subtracted from each other ( 24 - 3 ) for generating a feedback signal corresponding to a differentiated output signal of the quantification ( 30 ).