IP Library Granted Patent US 7,659,617
Granted Patent B2
US 7,659,617 · App. 11/606,771 · Granted Feb 9, 2010

Substrate for a flexible microelectronic assembly and a method of fabricating thereof

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Quick Facts
Patent No.
US 7,659,617
App. No.
11/606,771
Granted
Feb 9, 2010
Kind
B2
Abstract

Substrates having integrated rigid and flexible regions and methods of fabricating such substrates are disclosed. The substrates may advantageously be used for mounting semiconductor chips used in flexible microelectronic assemblies.

Claims (29)

1. A substrate for use in a microelectronic assembly comprising:

(a) a unitary dielectric structure having first and second regions, said dielectric structure bearing contact elements in said first region and bearing unitary traces extending between said first and second regions, at least some of said traces being connected to at least some of the contact elements; and

(b) a first dielectric encapsulant disposed on said dielectric structure in said first region, said first dielectric encapsulant being disposed so that said contact elements are exposed at a surface of the first dielectric encapsulant in said first region.

2. The substrate as claimed in claim 1 wherein said first dielectric encapsulant reinforces said dielectric structure in said first region so that said first region is more rigid than said second region.

3. The substrate as claimed in claim 1 wherein the contact elements project from a first surface of said dielectric structure and at least a portion of the first dielectric encapsulant forms a layer covering at least a portion of the first surface in the first region, such layer having a top surface remote from the first surface of the substrate, tips of the contact elements being exposed at the top surface of the layer.

4. The substrate as claimed in claim 1 wherein at least a portion of the first dielectric encapsulant forms a wall projecting from said dielectric structure and surrounding at least a portion of the first region.

5. The substrate as claimed in claim 1 further comprising in the first region an optical component affixed to the wall.

6. The substrate as claimed in claim 1 further comprising a conductive shield disposed proximate to said dielectric structure.

7. The substrate as claimed in claim 1 wherein the contact elements are contact pins, contact pads, or a combination thereof.

8. The substrate as claimed in claim 1 wherein the contact elements and the traces are formed from at least one conductive plate.

9. The substrate as claimed in claim 1 wherein in the second region trace ends are provided with electrical terminals.

10. The substrate as claimed in claim 1 wherein widths of at least some of the traces are equal to or smaller than widths of bases of the contact elements, said bases disposed proximate said dielectric structure.

11. The substrate as claimed in claim 10 wherein at least some of the traces have contact areas at least partially surrounding the bases of the contact elements.

12. The substrate as claimed in claim 1 further comprising a second encapsulant flexibly encapsulating the traces at least in the second region.

13. The substrate as claimed in claim 1 further comprising a conductive shield disposed adjacent to said dielectric structure and having an exposed electrical contact.

14. The substrate as claimed in claim 1 wherein the first dielectric encapsulant is molded from an epoxy, a thermoplastic, polyimide, or liquid crystal polymer.

15. The substrate as claimed in claim 1 wherein the first dielectric encapsulant comprises a recess adapted for receiving at least one microelectronic device.

16. A microelectronic element connected to the substrate of claim 1 , wherein the element is a fingerprint scanner.

17. A microelectronic element connected to the substrate of claim 1 , wherein the element is an image sensor.

18. A microelectronic element connected to the substrate of claim 1 , wherein the element is an RF package.

19. A microelectronic assembly, comprising:

a substrate including:

(a) a dielectric structure having first and second regions, said dielectric structure bearing contact elements in said first region and bearing unitary traces extending between said first and second regions, at least some of said traces being connected to at least some of the contact elements; and

(b) a first dielectric encapsulant disposed on said structure in said first region, said first dielectric encapsulant being disposed so said contact elements are exposed at a surface of the first dielectric encapsulant in said first region; and

at least one microelectronic device which terminals are selectively connected to said contact elements using a ball bonding technique or a wire bonding technique.

20. The assembly as claimed in claim 19 wherein said first dielectric encapsulant reinforces said structure in said first region so that said first region is more rigid than said second region.

21. The assembly as claimed in claim 19 wherein at least a portion of the first dielectric encapsulant forms a wall projecting from the structure and surrounding at least some of the at least one microelectronic device.

22. The assembly as claimed in claim 21 wherein the substrate in the first region further comprises an optical component affixed to the wall.

23. The assembly as claimed in claim 21 wherein the substrate further comprises a recess receiving the at least one microelectronic device.

Assignments (6)
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 073657/0979 →
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 073658/0661 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2007
From: KANG, TECK-GYU; PARK, JAE M.; KUBOTA, YOICHI
To: TESSERA, INC.
Reel/Frame 020173/0750 →