Resistor of semiconductor device and method for fabricating the same
View Patent ↗A resistor for a semiconductor device is provided. The resistor can include a first polysilicon layer formed on a semiconductor substrate; an insulating layer formed on regions of the first polysilicon layer; a second polysilicon layer formed on the insulating layer; and a contact electrically connected to the first polysilicon layer and the second polysilicon layer. The portions of the first polysilicon layer that do not have the insulating layer formed thereupon have a higher impurity ion concentration than that of the regions on which the insulating layer is formed.
1. A method for fabricating a resistor of a semiconductor device, the method comprising:
forming a first polysilicon layer, an insulating layer, and a second polysilicon layer on a semiconductor substrate;
patterning the insulating layer and the second polysilicon layer to expose a first portion of the first polysilicon layer;
implanting ions into the patterned second polysilicon layer and the first portion of the first polysilicon layer; and
forming contacts on the first portion of the first polysilicon layer and the patterned second polysilicon layer.
2. The method of claim 1 , wherein the insulating layer is an oxide-nitride-oxide (ONO) layer.
3. The method of claim 1 , wherein patterning the insulating layer and the second polysilicon layer to expose a first portion of the first polysilicon layer, comprises:
forming a plurality of second polysilicon patterns by removing a portion of the insulating layer and the second polysilicon layer.
4. The method of claim 1 , wherein the ions are implanted into the first portion of the first polysilicon layer using the patterned second polysilicon layer as a mask.
5. The method of claim 1 , wherein forming contacts on the first portion of the first polysilicon layer and the patterned second polysilicon layer, comprises:
forming two contacts on the patterned second polysilicon layer to connect to regions of the first portion of the first polysilicon layer located at both sides thereof.