CMOS image sensor
View Patent ↗Disclosed are a CMOS image sensor and a method for manufacturing the same. The CMOS image sensor includes a photodiode area and a floating diffusion area formed on a semiconductor substrate, a transistor formed on the semiconductor substrate between the photodiode area and the floating diffusion area, an isolation layer formed below the transistor, and a channel area formed between the transistor and the isolation layer.
1. A CMOS image sensor, comprising:
a photodiode area and a floating diffusion area formed on a semiconductor substrate;
a transistor formed on the semiconductor substrate between the photodiode area and the floating diffusion area;
an isolation layer formed below the transistor; and
a channel area formed between the transistor and the isolation layer,
wherein the isolation layer is buried in a first trench, and wherein the channel area is buried in a second trench on an upper side of the first trench.
2. The CMOS image sensor according to claim 1 , wherein the semiconductor substrate comprises a first conductive type low density epitaxial layer.
3. The CMOS image sensor according to claim 1 , wherein the photodiode area comprises a second conductive type low density diffusion area and a first conductive type high density diffusion area formed on the second conductive type low density diffusion area.
4. The CMOS image sensor according to claim 1 , wherein the floating diffusion area comprises a second conductive type high density diffusion area.
5. The CMOS image sensor according to claim 1 , wherein the isolation layer comprises an insulating material formed in a trench.
6. The CMOS image sensor according to claim 1 , wherein the isolation layer comprises an oxide layer formed through a local oxidation of silicon (LOCOS) process.
7. The CMOS image sensor according to claim 1 , wherein the channel area comprises a conductive layer formed in a trench.
8. The CMOS image sensor according to claim 1 , wherein the photodiode area is disposed to a first side of the isolation layer and the floating diffusion area is disposed to a second side of the isolation layer.
9. The CMOS image sensor according to claim 1 , wherein the channel area comprises a polysilicon layer disposed directly below the transistor.
10. The CMOS image sensor according to claim 1 , wherein the width of the isolation layer formed below the transistor is less than the width of the transistor.
11. The CMOS image sensor according to claim 1 , wherein the width of the bottom portion of the isolation layer is less than the width of the top portion of the isolation layer.