Method for fabricating CMOS image sensor

1. A method for fabricating a complementary metal oxide semiconductor image sensor, the method comprising:

preparing a semiconductor substrate defining a photodiode region and a transistor region;

sequentially forming an insulating layer and a conductive layer on an entire surface of the semiconductor substrate;

forming a photoresist pattern for defining a gate electrode on the conductive layer;

etching a portion of the conductive layer to a predetermined thickness using the photoresist pattern as a mask;

performing an ion implantation process on the etched portion of the conductive layer to form a doped conductive layer;

performing an oxidation process for oxidizing the doped conductive layer to transform the doped conductive layer into an oxide layer; and

removing the oxide layer and the insulating layer disposed thereunder to define a gate electrode and a gate insulating layer.

2. The method according to claim 1 , further comprising:

forming a first diffusion region in the photodiode region after defining the gate electrode and the gate insulating layer;

forming spacers on sidewalls of the gate electrode and the gate insulating layer;

forming a second diffusion region in the transistor region after forming the spacers; and

forming a third diffusion region on the first diffusion region.

3. The method according to claim 1 , wherein performing the ion implantation process to form the doped conductive layer comprises using an ion selected from the group consisting of arsenide (As) ion, phosphorous (P) ion, and boron (B) ion.

4. The method according to claim 1 , wherein removing the oxide layer and the insulating layer formed thereunder comprises performing a wet etching process.

5. A method for fabricating a complementary metal oxide semiconductor image sensor, the method comprising:

preparing a semiconductor substrate defining a photodiode region and a transistor region;

sequentially forming an insulating layer and a conductive layer on an entire surface of the semiconductor substrate;

forming a first photoresist pattern on the conductive layer;

etching the conductive layer to a predetermined thickness using the first photoresist pattern as a mask;

forming a second photoresist pattern on the etched conductive layer so as to cover the photodiode region;

etching the conductive layer and the insulating layer using the second photoresist pattern as a mask, wherein a portion of the conductive layer and the insulating layer remain over the photodiode region;

removing the first and second photoresist patterns;

forming a third photoresist pattern exposing only the photodiode region; and

removing the portion of the conductive layer and the insulating layer formed over the photodiode region using the third photoresist pattern as a mask to define a gate electrode and a gate insulating layer in the transistor region.

6. The method according to claim 5 , further comprising:

forming a first diffusion region in the photodiode region after defining the gate electrode and the gate insulating layer;

forming spacers on sidewalls of the gate electrode and the gate insulating layer;

forming a second diffusion region in the transistor region after forming the spacers; and

forming a third diffusion region in the first diffusion region.

7. The method according to claim 5 , wherein removing the portion of the conductive layer and the insulating layer formed over the photodiode region comprises performing a wet etching process.