Semiconductor device
View Patent ↗A semiconductor device is discloses that includes an n-type semiconductor substrate; an alternating conductivity type layer on semiconductor substrate, the alternating conductivity type layer including n-type drift regions and p-type partition regions arranged alternately; p-type channel regions on the alternating conductivity type layer; and trenches formed from the surfaces of the p-type channel regions down to respective n-type drift regions. The bottom of each trench is over the pn-junction between the p-type partition region and the n-type drift region. The semiconductor device facilitates preventing the on-resistance from increasing, obtaining a higher breakdown voltage, and reducing the variations caused in the characteristics thereof.
1. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type;
an alternating conductivity type layer on the semiconductor substrate, the alternating conductivity type layer comprising first semiconductor regions of the first conductivity type and second semiconductor regions of a second conductivity type arranged alternately;
channel regions of the second conductivity type on the alternating conductivity type layer; and
trenches extending through the channel regions with each of the trenches extending into one of the first semiconductor regions without extending into any of the second semiconductor regions,
wherein the bottom of the trench is closer to the second semiconductor region than to the center of the first semiconductor region.
2. The semiconductor device according to claim 1 , wherein the opening width of the trench is narrower than the distance between the center of the first semiconductor region and a second boundary of the second semiconductor region opposite to a first boundary, across which the second semiconductor region and the next adjacent first semiconductor region are in contact with each other.
3. The semiconductor device according to claim 1 , wherein the bottom of the trench exhibits a predetermined curvature.
4. The semiconductor device according to claim 1 , further comprising source regions of the first conductivity type, each of the source regions being formed on the opening edge of the trench in the surface portion of the channel region on the first semiconductor region.
5. The semiconductor device according to claim 1 , further comprising body regions of the second conductivity type in contact with the trenches, each of the body regions being in the surface portion of the channel region on the second semiconductor region.
6. The semiconductor device according to claim 1 , wherein the channel region on the second semiconductor region is formed more shallowly than the bottom of the trench.
7. The semiconductor device according to claim 1 , wherein the portion of the trench extending into the first semiconductor region is 1.5 μm or less in length in the depth direction.
8. The semiconductor device according to claim 1 , wherein the portion of the trench extending into the first semiconductor region is 1.0 μm or more in length in the depth direction.
9. The semiconductor device according to claim 1 , wherein the opening width of the trench is narrower than the width of a pair of first and second semiconductor regions.