Semiconductor device
View Patent ↗A semiconductor device is configured to prevent misprogramming of fuse circuits therein. The semiconductor device includes the following elements. A group of fuse element circuits 911 is configured to store a first data defining the circuit configuration. A fuse element circuit 913 is configured to store a second data representing inhibition of programming the group of fuse element circuits. A control logic circuit 140 is configured to program the first and the second data on the fuse element circuits. An AND gate circuit 914 is configured to inhibit the control logic circuit 140 from programming the group of fuse element circuits 911 on condition that the fuse element circuit 913 has been programmed.
1. A semiconductor device comprising:
a first fuse circuit;
a second fuse circuit;
a program control circuit performing, when allowed, a programming operation on the first fuse circuit; and
a gate circuit allowing the program control circuit to perform the programming operation on the first fuse circuit when the second fuse circuit produces a first level and inhibiting the program control circuit from performing the programming operation on the first fuse circuit when the second fuse circuit produces a second level,
wherein the second fuse circuit is programmed from the first level to the second level before the first fuse circuit has been programmed,
wherein the device further comprises a third fuse circuit, and a fourth fuse circuit, the program control circuit performs, when allowed, a programming operation on the third fuse circuit, the device further comprising an additional gate circuit allowing the program control circuit to perform the programming operation on the third fuse circuit when the fourth fuse produces the first level and inhibiting the program control circuit from performing the programming operation on the third fuse circuit when the fourth fuse circuit produces the second level, the fourth fuse circuit being programmed from the first level to the second level after the third fuse circuit has been programmed.
2. The semiconductor device according to claim 1 , wherein the first fuse circuit stores, when programmed by the program control circuit, a defective address.
3. The semiconductor device according to claim 1 , wherein the first fuse circuit stores, when programmed by the program control circuit, circuit configuration data regarding a word organization of an output data of the semiconductor device.
4. The semiconductor device according to claim 1 , wherein the first fuse circuit stores, when programmed by the program control circuit, circuit configuration data regarding a voltage of an internal electrical power source of the semiconductor device.
5. A semiconductor device comprising:
a first fuse circuit;
a second fuse circuit,
a program control circuit performing, when allowed, a programming operation on the first fuse circuit; and
a gate circuit inhibiting the program control circuit from performing the programming operation on the first fuse circuit when the second fuse circuit has been programmed to produce a second level,
wherein the second fuse circuit is programmed from the first level to the second level before the first fuse circuit has been programmed,
wherein the gate circuit allows the program control circuit to perform the programming operation on the first fuse circuit when the second fuse circuit has not been programmed to produce a first level,
wherein the device further comprises a third fuse circuit, and a fourth fuse circuit, the program control circuit performs, when allowed, a programming operation on the third fuse circuit, the device further comprising an additional gate circuit inhibiting the program control circuit from performing a programming operation on the third fuse circuit when the fourth fuse circuit has been programmed to produce the second level, the fourth fuse circuit being programmed from the first level to the second level after the third fuse circuit has been programmed.
6. The semiconductor device according to claim 5 , wherein the third fuse circuit stores, when programmed by the program control circuit, circuit configuration data regarding a word organization of an output data of the semiconductor device.
7. The semiconductor device according to claim 1 , wherein the third fuse circuit stores, when programmed by the program control circuit, a defective address.
8. The semiconductor device according to claim 1 , wherein the third fuse circuit stores, when programmed by the program control circuit, circuit configuration data regarding a word organization of an output data of the semiconductor device.
9. The semiconductor device according to claim 1 , wherein the third fuse circuit stores, when programmed by the program control circuit, circuit configuration data regarding a voltage of an internal electrical power source of the semiconductor device.
10. The semiconductor device according to claim 2 , wherein the third fuse circuit stores, when programmed by the program control circuit, an additional defective address.