Dielectric barrier for nanocrystals
View Patent ↗Electronic apparatus, systems, and methods of forming such electronic apparatus and systems include non-insulating nanocrystals disposed on a dielectric stack, where the non-insulating nanocrystals are arranged to store electric charge. The dielectric stack includes two dielectric layers having different electron barriers such that the non-insulating nanocrystals may be disposed on the dielectric layer having the lower electron barrier.
1. An apparatus comprising:
a substrate;
a dielectric stack formed over the substrate, the dielectric stack including a first dielectric material with a first element and a second dielectric material with a second element; and
a non-insulating nanocrystal disposed on the second dielectric material, the non-insulating nanocrystal to store electric charge, wherein the first dielectric material and the second dielectric material are configured to have a gradual composition change to provide a one-sided triangle type of band offset across the first dielectric material and the second dielectric material of the dielectric stack with a highest energy at an interface of the first dielectric material and the substrate such that concentrations of the first and second elements continuously vary to result in a graded composition with a graded energy band from the substrate to the non-insulating nanocrystal.
2. The apparatus of claim 1 , wherein the second dielectric material includes dielectric material structured as a diffusion barrier between the non-insulating nanocrystal and the first dielectric material.
3. The apparatus of claim 1 , wherein the second dielectric material includes hafnium oxide and the first dielectric material includes silicon oxide.
4. The apparatus of claim 1 , wherein the second dielectric material includes a high-κ dielectric material and the first dielectric material includes silicon oxide.
5. The apparatus of claim 1 , wherein the non-insulating nanocrystal is one of a set of spaced apart non-insulating nanocrystals, the spaced apart non-insulating nanocrystals including ruthenium nanocrystals.
6. The apparatus of claim 1 , wherein the non-insulating nanocrystal is one of a set of spaced apart non-insulating nanocrystals, the spaced apart non-insulating nanocrystals including platinum nanocrystals.
7. The apparatus of claim 1 , wherein the non-insulating nanocrystal is one of a set of spaced apart non-insulating nanocrystals, the spaced apart non-insulating nanocrystals including conductive metal oxides.
8. The apparatus of claim 1 , wherein the non-insulating nanocrystal is one of a set of spaced apart non-insulating nanocrystals, the spaced apart non-insulating nanocrystals including conductive metal nitrides.
9. The apparatus of claim 1 , wherein the non-insulating nanocrystal is one of a set of spaced apart non-insulating nanocrystals, the spaced apart non-insulating nanocrystals including semiconductor nanocrystals.
10. The apparatus of claim 1 , wherein the dielectric stack includes a dielectric layer in addition to the first dielectric material and the second dielectric material.
11. The apparatus of claim 1 , wherein the apparatus includes:
an insulating layer disposed on the non-insulating nanocrystals; and
a conductive control layer disposed on the insulating layer.
12. The apparatus of claim 1 , wherein the apparatus includes a memory having the non-insulating nanocrystal as a storage region of the memory.
13. The apparatus of claim 12 , wherein the memory is a flash memory.
14. The apparatus of claim 1 , wherein the apparatus includes a wireless device.
15. A method comprising:
forming a dielectric stack over a substrate, the dielectric stack including a first dielectric material with a first element and a second dielectric material with a second element; and
forming a non-insulating nanocrystal disposed on the second dielectric material, the non-insulating nanocrystal to store electric charge, wherein the first dielectric material and the second dielectric material are configured to have a gradual composition change to provide a one-sided triangle type of band offset across the first dielectric material and the second dielectric material of the dielectric stack with a highest energy at an interface of the first dielectric material and the substrate such that concentrations of the first and second elements continuously vary to result in a graded composition with a graded energy band from the substrate to the non-insulating nanocrystal.
16. The method of claim 15 , wherein forming the non-insulating nanocrystal includes forming non-insulating nanocrystals by chemical vapor deposition.
17. The method of claim 15 , wherein forming the non-insulating nanocrystal includes forming non-insulating nanocrystals by atomic layer deposition.
18. The method of claim 15 , wherein forming a first dielectric material and forming a second dielectric material include forming the first dielectric material and the second dielectric material such that the electron barrier of the first dielectric material differs from the electron barrier of the second dielectric material by an energy having a magnitude in the range of between 0.5 eV and 3.0 eV.
19. The method of claim 15 , wherein the method includes forming the second dielectric material as a diffusion barrier between the non-insulating nanocrystal and the first dielectric material.
20. The method of claim 15 , wherein forming a first dielectric material includes forming a layer of silicon oxide and forming a second dielectric material includes forming a layer of hafnium oxide.
21. The method of claim 15 , wherein the method includes forming the non-insulating nanocrystal as a charge storage region in a flash memory.