IP Library Granted Patent US 7,544,595
Granted Patent B2
US 7,544,595 · App. 11/619,861 · Granted Jun 9, 2009

Forming a semiconductor device having a metal electrode and structure thereof

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Quick Facts
Patent No.
US 7,544,595
App. No.
11/619,861
Granted
Jun 9, 2009
Kind
B2
Abstract

A method for forming a semiconductor device includes forming a gate dielectric over a substrate, forming a metal electrode over the gate dielectric, forming a first sacrificial layer which includes polysilicon or a metal over the metal electrode, removing the first sacrificial layer, and forming a gate electrode contact over and coupled to the metal electrode.

Claims (36)

1. A method for forming a semiconductor device comprising:

forming a gate dielectric over a substrate;

forming a metal electrode over the gate dielectric;

forming a first sacrificial layer over the metal electrode, wherein the first sacrificial layer comprises a material selected from a group consisting of polysilicon and a metal;

removing the first sacrificial layer; and

forming a gate electrode contact over and coupled to the metal electrode.

2. The method of claim 1 , further comprising:

forming a spacer adjacent the metal electrode and the first sacrificial layer, wherein forming the spacer is performed prior to removing the first sacrificial layer.

3. The method of claim 1 , wherein forming the first sacrificial layer comprises forming the first sacrificial layer comprising polysilicon.

4. The method of claim 1 , wherein forming the first sacrificial layer comprises forming the first sacrificial layer comprising a first metal.

5. The method of claim 4 , wherein forming the first sacrificial layer comprising the first metal comprises:

forming the first sacrificial layer comprising the first metal, wherein the first sacrificial layer is capable of being removed selective to the metal electrode.

6. The method of claim 4 , wherein forming the metal electrode comprises forming the metal electrode comprising a second metal, different from the first metal.

7. The method of claim 1 , wherein forming the metal electrode comprises forming the metal electrode having a thickness in a range of approximately 20 to approximately 200 Angstroms, and forming the first sacrificial layer comprises forming the first sacrificial layer having a thickness in a range of approximately 400 to approximately 1000 Angstroms.

8. The method of claim 1 , further comprising:

forming a second sacrificial layer over the first sacrificial layer; and

removing the second sacrificial layer prior to forming the gate electrode contact.

9. The method of claim 8 , wherein forming the second sacrificial layer comprises forming the second sacrificial layer comprising nitride.

10. The method of claim 8 , wherein forming the second sacrificial layer comprises forming the second sacrificial layer comprising a metal.

11. A method for forming a semiconductor device comprising:

forming a gate dielectric over a substrate;

forming a metal electrode over the gate dielectric;

forming a first sacrificial layer over the metal electrode, the first sacrificial layer comprising polysilicon;

forming a second sacrificial layer over the first sacrificial layer;

forming a spacer adjacent the metal electrode, the first sacrificial layer, and the second sacrificial layer;

removing the second sacrificial layer;

removing the first sacrificial layer; and

forming a gate electrode contact over and coupled to the metal electrode.

12. The method of claim 11 , wherein forming the second sacrificial layer comprises forming the second sacrificial layer comprising nitride.

13. The method of claim 11 , wherein forming the second sacrificial layer comprises forming the second sacrificial layer comprising a metal.

14. The method of claim 11 , wherein forming the spacer comprises forming the spacer having a height that is at least twice a combined height of the metal electrode and the gate dielectric.

15. The method of claim 11 , wherein forming the metal electrode comprises forming the metal electrode having a thickness in a range of approximately 20 to approximately 200 Angstroms.

16. The method of claim 11 , wherein forming the first sacrificial layer comprises forming the first sacrificial layer having a thickness in a range of approximately 400 to approximately 1000 Angstroms.

17. The method of claim 11 , wherein forming the second sacrificial layer comprises forming the second sacrificial layer having a thickness in a range of approximately 50 to approximately 400 Angstroms.

18. The method of claim 11 , further comprising:

forming source/drain regions in the substrate adjacent and underlying at least a portion of the gate dielectric prior to removing the first sacrificial layer and prior to removing the second sacrificial layer.

Assignments (19)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2026
From: NXP USA, INC.
To: NEXTECH SEMICONDUCTOR, LLC
Reel/Frame 073858/0728 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0640 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0823 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →