IP Library Granted Patent US 7,378,993
Granted Patent B1
US 7,378,993 · App. 11/619,932 · Granted May 27, 2008

Method and system for transmitting data

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Quick Facts
Patent No.
US 7,378,993
App. No.
11/619,932
Granted
May 27, 2008
Kind
B1
Abstract

A method and system for transmitting binary-coded data use partitioning of data words in a plurality of data nibbles. The data nibbles are coded using modified a 1-bit hot coding format that transforms a data nibble in a data segment including a plurality of bit groups. A change in a digital state at a bit position in a more significant bit group is maintained at that bit position in less significant bit groups, and information is transmitted in a form of a transition between digital states. The data segments are transmitted in phases each including one bit group from each data segment. At a receiving terminal, the bit groups are converted back in the binary-coded data words. In one application, the invention is used to reduce power consumption during data transmissions to and from an integrated circuit device.

Claims (68)

1. A method for transmitting binary-coded data, comprising:

(a) partitioning each binary-coded data word in a plurality of data nibbles, each data nibble having a pre-determined number of consecutive bits of the binary-coded data word;

(b) coding each data nibble using a coding format transforming a data nibble in a data segment having a plurality of bit groups, wherein:

a number of bits in each bit group is equal to the pre-determined number; and

a change in a digital state at a bit position in a more significant bit group is maintained at that bit position in less significant bit groups of the data segment;

(c) transmitting data segments in phases, each phase including one bit group from each data segment.

2. The method of claim 1 wherein the step (a) further comprises:

setting the pre-determined number to 4.

3. The method of claim 1 wherein the step (b) further comprises:

transmitting a digital state at a bit position in the bit group in a form of a transition between digital states.

4. The method of claim 1 wherein the step (c) further comprises:

synchronizing transmission of at least a portion of the phases with the same edge of a clock signal.

5. The method of claim 1 wherein the step (c) further comprises:

transmitting bit groups including bits of same significance using pre-assigned bit lanes of a transmission bus.

6. The method of claim 1 further comprising:

(d) assembling, at a destination terminal, received bit groups in received data segments;

(e) re-formatting the received data segments in received data nibbles; and

(f) assembling the binary-coded data word from the received data nibbles.

7. The method of claim 6 wherein the step (d) further comprises:

assembling the received data segments using one received bit group in each of the phases.

8. The method of claim 6 wherein the step (e) further comprises:

selectively converting each data segment in a data nibble of the binary-coded data word.

9. The method of claim 1 wherein the binary-coded data is coded using a binary-coded decimal (BCD) format, a binary-coded hexadecimal (BCH) format, or a binary-coded octal (BCO) format.

10. The method of claim 1 wherein the binary-coded data is information, an address of the information, a command, or a combination thereof.

11. A device, comprising:

(a) coding data in binary-coded data words using at least one digital data format;

(b) at a transmitting terminal:

(b1) partitioning each binary-coded data word in a plurality of data nibbles, each data nibble having a pre-determined number of consecutive bits of the binary-coded data word;

(b2) coding each data nibble using a modified 1-bit hot coding format transforming a data nibble in a data segment having a plurality of bit groups, wherein:

a number of bits in each bit group is equal to the pre-determined number; and

a change in a digital state at a bit position in a more significant bit group is maintained at that bit position in less significant bit groups of the data segment; and

(b3) transmitting data segments in phases, each phase including one bit group from each data segment; and

(c) at a receiving terminal:

(c1) assembling received bit groups in received data segments;

(c2) re-formatting the received data segments in received data nibbles; and

(c3) assembling the binary-coded data word from the received data nibbles.

12. The method of claim 11 wherein the step (b2) further comprises:

transmitting a digital state at a bit position in the bit group in a form of a transition between digital states.

13. The method of claim 11 wherein the step (b3) further comprises:

synchronizing transmission of at least a portion of the phases with the same edge of a clock signal.

14. The method of claim 11 wherein the step (b3) further comprises:

transmitting bit groups including bits of same significance using pre-assigned bit lanes of a transmission bus.

15. The method of claim 11 wherein the step (c1) further comprises:

assembling the received data segments using one received bit group in each of the phases.

16. A computer readable medium storing program code that, when executed by a data processor, facilitates execution of the method of claim 11 .

17. A system for transmitting binary-coded data, comprising:

a transmitting terminal; and

a receiving terminal coupled to the transmitting terminal using a system interface including at least one of a data bus, an address bus, a command bus, or a combination thereof, wherein each of said terminals includes at least one unit, including:

(a) a TX state machine adapted for processing an outgoing data stream and:

(a1) partitioning each binary-coded data word in a plurality of data nibbles, each data nibble having a pre-determined number of consecutive bits of the binary-coded data word;

(a2) coding each data nibble using a modified 1-bit hot coding format transforming a data nibble in a data segment having a plurality of bit groups, wherein:

a number of bits in each bit group is equal to the pre-determined number; and

a change in a digital state at a bit position in a more significant bit group is maintained at that bit position in less significant bit groups of the data segment; and

(a3) transmitting data segments in phases, each phase including one bit group from each data segment;

(b) a RX state machine adapted to process an incoming data stream and:

(b1) assembling received bit groups in received data segments;

(b2) re-formatting the received data segments in received data nibbles; and

(b3) assembling the binary-coded data word from the received data nibbles; and

(c) means providing selective connectivity between the TX and RX state machines and the interface.

18. The system of claim 17 , wherein the at least one unit further comprises:

a bus control state machine administering the RX and TX state machines.

19. The system of claim 17 wherein at least one unit further comprises:

means allowing to bypass the TX and RX state machines during transmission or receipt of the binary-coded data.

20. The system of claim 17 , wherein, during the step (a2), the TX state machine is further adapted for transmitting a digital state at a bit position in the bit group in a form of a transition between digital states.

21. The system of claim 17 , wherein, during the step (a3), the TX state machine is further adapted for synchronizing transmission of at least a portion of the phases with the same edge of a clock signal.

22. The system of claim 17 , wherein, during the step (a3), the TX state machine is further adapted for transmitting bit groups including bits of same significance using pre-assigned bit lanes of a transmission bus.

23. The system of claim 17 , wherein the binary-coded data is coded using a binary-coded decimal (BCD) format, a binary-coded hexadecimal (BCH) format, or a binary-coded octal (BCO) format.

24. The system of claim 17 , wherein said system is a portion of a system-on-chip (SoC) device.

Assignments (18)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2025
From: NXP USA, INC.
To: ASCALE TECHNOLOGIES LLC
Reel/Frame 070026/0838 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0640 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →