Optical isolator device, and method of making same
View Patent ↗The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.
1. A method, comprising:
obtaining a single SOI substrate, said SOI substrate having an active layer comprised of silicon and a buried insulation layer;
forming a doped layer of silicon above said active layer of said SOI substrate;
forming first and second isolated regions in at least said doped layer of silicon;
forming a photon generating device in said first isolated region; and
forming a vertical photon receiving device in said second isolated region.
2. The method of claim 1 , wherein said doped layer of silicon is a doped layer of epitaxial silicon that is formed by a process comprised of introducing a dopant material during an epitaxial deposition process performed to form said doped layer of epitaxial silicon.
3. The method of claim 1 , wherein said doped layer of silicon is a doped layer of epitaxial silicon that is formed by a process comprised of:
performing an epitaxial deposition process to form a layer of epitaxial silicon; and
performing at least one ion implant process to introduce a dopant material into said layer of epitaxial silicon formed by said epitaxial deposition process.
4. The method of claim 1 , wherein forming said doped layer of silicon comprises forming said doped layer of silicon such that it has a thickness that ranges from approximately 10-30 microns.
5. The method of claim 1 , wherein said doped layer of silicon is doped with an N-type dopant material.
6. The method of claim 1 , wherein said doped layer of silicon has a dopant concentration that ranges from approximately 3×10 14 -10 15 ions/cm 3 .
7. The method of claim 1 , wherein forming said first and second isolated regions in at least said doped layer of silicon comprises forming a plurality of trench isolation regions that extend through said doped layer of silicon and contact said buried insulation layer of said SOI substrate to thereby form said first and second isolated regions.
8. The method of claim 7 , wherein said trench isolation regions are filled with at least one insulating material.
9. The method of claim 1 , wherein said photon generating device is comprised of at least one of a forward biased diode, a reverse biased diode and a bipolar transistor.
10. The method of claim 1 , wherein said vertical photon receiving device is comprised of at least one of a bipolar transistor, a forward biased diode, a reverse biased diode, an avalanche diode, an avalanche transistor and a field effect transistor.
11. The method of claim 1 , wherein said photon generating device is a diode and said vertical photon receiving device is a bipolar transistor, and the method further comprises:
performing at least one ion implant process to form a P-doped region in said first isolated region for said diode and to form a P-doped base region in said second isolated region to form a base region for said bipolar transistor;
performing at least one ion implant process to form an N-doped emitter region within said P-doped base region of said bipolar transistor; and
forming at least one conductive contact to each of said P-doped region of said diode and said N-doped emitter region of said bipolar transistor.
12. The method of claim 1 , wherein said photon generating device is a diode and said vertical photon receiving device is a bipolar transistor, and the method further comprises:
performing at least one ion implant process to form an N-doped region in said first isolated region for said diode and to form an N-doped base region in said second isolated region to form a base region for said bipolar transistor;
performing at least one ion implant process to form a P-doped emitter region within said N-doped base region of said bipolar transistor; and
forming at least one conductive contact to each of said N-doped region of said diode and said P-doped emitter region of said bipolar transistor.
13. The method of claim 1 , wherein forming the photon generating device further comprises forming a vertical photon generating device.
14. The method of claim 13 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and forming the vertical photon generating device comprises forming a first doped region doped with ions having a second conductivity type different than the first conductivity type in the first isolated region.
15. The method of claim 1 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and forming the vertical photon receiving device comprises:
forming a first doped region doped with ions having a second conductivity type different than the first conductivity type in the first isolated region; and
forming a second doped region doped with ions having the first conductivity type in the first doped region.
16. A method, comprising:
obtaining a single SOI substrate, said SOI substrate having a doped active layer comprised of silicon formed on a buried insulation layer;
forming first and second isolated regions in said doped active layer of silicon;
forming a photon generating device in said first isolated region; and
forming a vertical photon receiving device in said second isolated region.
17. The method of claim 16 , wherein said doped active layer of silicon is comprised of silicon that is formed by the Czochralski (CZ) method.
18. The method of claim 16 , wherein said doped active layer of silicon is a doped layer formed by performing at least one ion implant process to introduce a dopant material into said active layer of silicon.
19. The method of claim 16 , wherein forming said first and second isolated regions in at least said active doped layer of silicon comprises forming a plurality of trench isolation regions that extend through said active doped layer of silicon and contact said buried insulation layer of said SOI substrate to thereby form said first and second isolated regions.
20. The method of claim 16 , wherein said photon generating device is comprised of at least one of a forward biased diode, a reverse biased diode and a bipolar transistor.
21. The method of claim 16 , wherein said vertical photon receiving device is comprised of at least one of a bipolar transistor, a forward biased diode, a reverse biased diode, an avalanche diode, an avalanche transistor and a field effect transistor.
22. The method of claim 18 , wherein said photon generating device is a diode and said vertical photon receiving device is a bipolar transistor, and the method further comprises:
performing at least one ion implant process to form a P-doped region in said first isolated region for said diode and to form a P-doped base region in said second isolated region to form a base region for said bipolar transistor;
performing at least one ion implant process to form an N-doped emitter region within said P-doped base region of said bipolar transistor; and
forming at least one conductive contact to each of said P-doped region of said diode and said N-doped emitter region of said bipolar transistor.
23. The method of claim 18 , wherein said photon generating device is a diode and said vertical photon receiving device is a bipolar transistor, and the method further comprises:
performing at least one ion implant process to form an N-doped region in said first isolated region for said diode and to form an N-doped base region in said second isolated region to form a base region for said bipolar transistor;
performing at least one ion implant process to form a P-doped emitter region within said N-doped base region of said bipolar transistor; and
forming at least one conductive contact to each of said N-doped region of said diode and said P-doped emitter region of said bipolar transistor.
24. The method of claim 16 , wherein forming the photon generating device further comprises forming a vertical photon generating device.
25. The method of claim 24 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and forming the vertical photon generating device comprises forming a first doped region doped with ions having a second conductivity type different than the first conductivity type in the first isolated region.
26. The method of claim 16 , wherein the first isolated region includes silicon doped with ions of a first conductivity type, and forming the vertical photon receiving device comprises:
forming a first doped region doped with ions having a second conductivity type different than the first conductivity type in the first isolated region; and
forming a second doped region doped with ions having the first conductivity type in the first doped region.