IP Library Granted Patent US 7,759,149
Granted Patent B2
US 7,759,149 · App. 11/628,957 · Granted Jul 20, 2010

Gallium nitride-based semiconductor stacked structure

Assignee: Showa Denko K.K.
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Quick Facts
Patent No.
US 7,759,149
App. No.
11/628,957
Granted
Jul 20, 2010
Kind
B2
Abstract

A gallium-nitride-based semiconductor stacked structure includes a sapphire substrate; a low-temperature-deposited buffer layer which is composed of a Group III nitride material of Al X Ga Y N (0.5<Y≦1, X+Y=1) containing gallium (Ga) in a predominant amount with respect to aluminum (Al), which has been grown at low temperature and which is provided in a junction area thereof joined to a (0001) plane (c-plane) of the sapphire substrate with a single crystal in an as-grown state; and a gallium-nitride (GaN)-based semiconductor layer formed on the low-temperature-deposited buffer layer. The low-temperature-deposited buffer layer is predominantly composed of an as-grown single crystal which has a [1.0.−1.0.] orientation parallel to a [2.−1.−1.0.] direction of a lattice forming a (0001) basal plane of the sapphire substrate.

Claims (14)

1. A method for forming a gallium-nitride-based semiconductor stacked structure comprising the steps of:

providing a sapphire substrate;

forming, on the sapphire substrate, a low-temperature-deposited buffer layer which is composed of a Group III nitride material of Al X Ga Y N (0.5<Y≦1, X+Y=1) containing gallium (Ga) in a predominant amount with respect to aluminum (Al) and which is provided in a junction area thereof joined to a (0001) plane (c-plane) of the sapphire substrate with a single crystal in an as-grown state; and

forming a gallium-nitride-based semiconductor layer on the low-temperature-deposited buffer layer;

wherein the low-temperature-deposited buffer layer is formed on the (0001) plane of the sapphire substrate in such a manner that the junction area is predominantly formed of an as-grown single crystal which has a [1.0.−1.0.] orientation parallel to a [2.−1.−1.0.] direction of a lattice forming the (0001) plane of the sapphire substrate,

wherein the as-grown single crystal which is contained in the low-temperature-deposited buffer layer and which predominantly forms the junction area joined to the sapphire substrate has a thickness of 1 nm or more when formation of the low-temperature-deposited buffer layer has been completed.

2. A method for forming a gallium-nitride-based semiconductor stacked structure according to claim 1 , wherein the low-temperature-deposited buffer layer is formed on the (0001) plane of the sapphire substrate at 350° C. to 450° C.

3. A method for forming a gallium-nitride-based semiconductor stacked structure according to claim 1 , wherein the low-temperature-deposited buffer layer is formed on the (0001) plane of the sapphire substrate at a growth rate of 1 nm/min to 3 nm/min.

4. A method for forming a gallium-nitride-based semiconductor stacked structure comprising the steps of:

providing a sapphire substrate;

forming, on the sapphire substrate, a low-temperature-deposited buffer layer which is composed of a Group III nitride material of Al X Ga Y N (0.5<Y≦1, X+Y=1) containing gallium (Ga) in a predominant amount with respect to aluminum (Al) and which is provided in a junction area thereof joined to a (0001) plane (c-plane) of the sapphire substrate with a single crystal in an as-grown state; and

forming a gallium-nitride-based semiconductor layer on the low-temperature-deposited buffer layer;

wherein the low-temperature-deposited buffer layer is formed on the (0001) plane of the sapphire substrate in such a manner that the junction area is predominantly formed of an as-grown single crystal which has a [1.0.−1.0.] orientation parallel to a [2.−1.−1.0.] direction of a lattice forming the (0001) plane of the sapphire substrate, and

wherein the low-temperature-deposited buffer layer is formed on the (0001) plane of the sapphire substrate at a growth rate of 1 nm/min to 3 nm/min controlled through regulation of an amount, per unit time, of a Group III element source including gallium or aluminum supplied to a growth reaction system for growing the low-temperature-deposited buffer layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2012
From: SHOWA DENKO KABUSHIKI KAISHA
To: TOYODA GOSEI CO., LTD.
Reel/Frame 029489/0249 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2007
From: UDAGAWA, TAKASHI
To: SHOWA DENKO K.K.
Reel/Frame 019041/0508 →
Priority Claims (1)
JP 2004-171108 · Jun 9, 2004 · national
Continuity (2)
Provisional Application 6058091000 · Jun 21, 2004
Related Publication 20080283823A1 · Nov 20, 2008