IP Library Granted Patent US 7,989,855
Granted Patent B2
US 7,989,855 · App. 11/628,976 · Granted Aug 2, 2011

Semiconductor device including a deflected part

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,989,855
App. No.
11/628,976
Granted
Aug 2, 2011
Kind
B2
Abstract

This invention relates to a semiconductor device having a beam made of a semiconductor to which strain is introduced by deflection, and a current is permitted to flow in the beam.

Claims (33)

1. A semiconductor device, comprising:

a beam adapted for a current to flow through,

wherein the beam comprises a semiconductor and a deflected part,

wherein the beam has a doubly-clamped beam structure in which both ends are fixed and tensile strain is applied in a beam direction,

wherein an underfill is disposed on a lower surface of the deflected part.

2. The semiconductor device as claimed in claim 1 , wherein the beam is used as a channel region in a field effect transistor (FET).

3. The semiconductor device as claimed in claim 2 , wherein the FET comprises a FinFET which uses at least a side surface of the beam as a channel region.

4. The semiconductor device as claimed in claim 2 , wherein the FET comprises a planar type FET which uses an upper surface of the beam as a channel region.

5. The semiconductor device as claimed in claims 1 , wherein a center of the beam is in contact with a void bottom under the beam.

6. The semiconductor device as claimed in claim 5 , wherein a strain in the beam is controlled by a length of the beam before the beam is deflected and a depth of the void under the beam.

7. The semiconductor device as claimed in claim 6 , wherein the semiconductor device comprises a plurality of FinFETs and comprises at least two types of FinFETs in which the strain is differently introduced by altering at least one of the length of the beam before the beam is deflected and the depth of the void under the beam.

8. The semiconductor device of claim 1 , wherein a void is formed underneath the deflected part, and

wherein a length of the deflected part depends on a length of the beam before deflection, and a depth of the void.

9. The semiconductor device of claim 1 , wherein a void is formed underneath the deflected part, and

wherein a length of the deflected part is described by a formula:

Length of a deflected part=2 R tan′( L/ 2/( R−d ))

wherein R comprises a radius of an arc of a deflection,

wherein L comprises a length of the beam before the beam is deflected, and

wherein d comprises a depth of the void.

10. The semiconductor device of claim 1 , wherein the deflected part comprises substantially an arc shape.

11. The semiconductor device of claim 1 , wherein a void is formed underneath the deflected part, and

wherein a radius of an arc of a deflection in the deflected part is described by a formula:

R=d/ 2 +L 2 /8/ d

wherein R comprises the radius of the arc of the deflection,

wherein L comprises a length of the beam before the beam is deflected, and

wherein d comprises a depth of the void.

12. The semiconductor device of claim 1 , wherein a strain of the deflected part is determined from a difference between a length of the deflected part, and a length of the beam before the beam is deflected.

13. The semiconductor device of claim 1 , wherein a void is formed beneath the beam, and

wherein a strain of the deflected part is determined based on a ratio of a length of the beam before the beam is deflected, and a depth of the void.

14. The semiconductor device of claim 1 , further comprising a gate electrode, a source electrode, and a drain electrode,

wherein the source electrode and the drain electrode are located in the deflected part.

15. The semiconductor device of claim 1 , wherein a strain of the deflected part is in a range from 0.1% strain to 2% strain.

16. The semiconductor device of claim 1 , wherein the semiconductor device comprises a plurality of ones of said beam.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: NEC CORPORATION
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 034834/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2006
From: NARIHIRO, MITSURU
To: NEC CORPORATION
Reel/Frame 018669/0606 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2006
From: NARIHIRO, MITSURU
To: NEC CORPORATION
Reel/Frame 018699/0814 →