Flash memory device and method of manufacturing the same
View Patent ↗Disclosed is a flash memory device. The flash memory device includes a plurality of trench lines in an isolation region of a semiconductor device, a common source region along a word line (WL) direction under a surface portion of the semiconductor substrate, a plurality of gate lines along a vertical direction of the trench line, a drain region on an opposite side of the gate line to the common source region, a drain contact over the drain region, and a uniform by-product layer on the common source region.
1. A method of manufacturing a flash memory device, comprising the steps of:
forming a gate line on a semiconductor substrate having an isolation layer;
forming a mask on the semiconductor substrate and the gate line exposing a common source region;
removing the isolation layer in the common source region using the mask and the gate line as an etch mask and uniformly depositing an isolation layer removal by-product; and
implanting impurity ions into the exposed common source region.
2. The method of manufacturing a flash memory device as claimed in claim 1 , wherein removing the isolation layer comprises a plasma etching process.
3. The method of manufacturing a flash memory device as claimed in claim 2 , wherein the plasma etching process comprises generating a plasma through an MERIE (magnetic enhanced reactive ion etching) scheme.
4. The method of manufacturing a flash memory device as claimed in claim 1 , wherein the impurity ions are further implanted into a surface of a predetermined trench region.
5. The method of manufacturing a flash memory device as claimed in claim 1 , wherein the by-product comprises a fluorocarbon- and/or hydrofluorocarbon-based polymer.
6. The method of manufacturing a flash memory device as claimed in claim 1 , wherein the mask exposes a gap between the gate line and a neighboring gate line.
7. The method of manufacturing a flash memory device as claimed in claim 1 , wherein removing the isolation layer comprises processing in a plasma apparatus for 30 to 90 seconds.
8. The method of manufacturing a flash memory device as claimed in claim 1 , wherein removing the isolation layer comprises plasma etching under conditions including an electric power of about 1,500 W to 2,000 W and a pressure of about 10 mT to 50 mT.
9. The method of manufacturing a flash memory device as claimed in claim 1 , wherein removing the isolation layer comprises etching in the presence of a plasma formed from C 5 F 8 gas, CH 2 F 2 gas, and an inert gas.
10. The method of manufacturing a flash memory device as claimed in claim 1 , wherein removing the isolation layer comprises feeding C 5 F 8 gas at a rate of about 5 sccm to 20 sccm, CH 2 F 2 gas at a rate of about 1 sccm, and Ar gas at a rate of about 300 sccm to 500 sccm.
11. The method of manufacturing a flash memory device as claimed in claim 1 , wherein the by-product is formed on the exposed surface portion of the semiconductor substrate after removing the isolation layer in the common source region.
12. The method of manufacturing a flash memory device as claimed in claim 1 , further comprising controlling an amount of the by-product by controlling an etching process time.