RF module package for releasing stress
View Patent ↗The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the die; a protection layer formed over the RDL; and pluralities of pads formed on the protection layer and coupled to the RDL. The RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
1. A RF module package structure comprising:
a substrate with a die receiving through hole and contact conductive pads and metal through holes, wherein said substrate is made of organic epoxy, FR5, FR4 BT, silicon, PCB (print circuit board) material, glass or ceramic type material, and the CTE of said substrate is substantially the same with that of a PCB;
a conductive slice attached on a lower surface of said substrate;
multiple dice disposed within said die receiving through hole and on said conductive slice, wherein an elastic core paste is filled the space (gap) between a die edge and a sidewall of said through holes of said substrate, and, a top surface of said dice, said substrate and said elastic core paste are at the same plane whereby CTE mismatching between said substrate and said die is reduced during panel form process;
multiple elastic dielectric stacking structure stacked on said multiple dice and said substrate wherein a bottom of said dielectric stacking structure is directly disposed on a top surface of said substrate and an active surface of said dice whereby the Z direction stress is absorbed;
multiple re-distribution layers (RDL) formed within said multiple elastic dielectric stacking structure and coupled to said dice;
a top conductive layer formed over said multiple dielectric stacking structure; and
multiple heat sinks disposed on said top conductive layer.
2. The structure of claim 1 , wherein the materials of said heat sink includes molecular cooling fan.
3. The structure of claim 1 , further comprising conductive bumps coupled to pluralities of terminal pads.
4. The structure of claim 1 , wherein said multiple dice are including the power amplifier, band pass filter, low noise amplifier, switch and integrated passive device (IPD).
5. The structure of claim 1 , wherein the materials of said multiple dice includes the gallium arsenic (GaAs) and silicon chips.
6. The structure of claim 1 , wherein said multiple RDLs are including the inductors and resistors.
7. The structure of claim 1 , wherein said multiple RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
8. The structure of claim 1 , wherein the material of said top conductive layer includes Cu.