Wafer level package with die receiving through-hole and method of the same
View Patent ↗The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die disposed within the die receiving through hole; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.
1. A structure of semiconductor device package comprising:
a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad, wherein said first contact pad is formed over said connecting through hole structure, and wherein the material of said substrate includes epoxy type FR5 or FR4;
a die disposed within said die receiving through hole;
a surrounding material formed under said die and filled in the gap between said die and sidewall of said die receiving though hole;
a dielectric layer formed on said die and said substrate;
a re-distribution layer (RDL) formed on said dielectric layer, wherein said RDL directly couples bonding pads of said die to said first contact pad over said connecting through hole structure;
a protection layer formed over said RDL; and
a second contact pad formed at the lower surface of said substrate and under said connecting through hole structure.
2. The structure of claim 1 , further comprising conductive bumps coupled to said second contact pad.
3. The structure of claim 1 , wherein said RDL comprises Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
4. The structure of claim 1 , wherein the material of said substrate further includes bismaleimide triazine (BT), silicon, PCB (print circuit board) material, glass or ceramic.
5. The structure of claim 1 , wherein the material of said substrate further includes alloy or metal.
6. The structure of claim 1 , wherein said surrounding material includes elastic core paste material.
7. The structure of claim 1 , further comprising a conductive layer on sidewall of said die receiving through hole.
8. The structure of claim 1 , wherein said dielectric layer includes an elastic dielectric layer, a photosensitive layer, a silicone dielectric based layer, a siloxane polymer (SINR) layer, a polyimides (PI) layer or silicone resin layer.