Resistor ladder interpolation for subranging ADC
View Patent ↗An analog to digital converter includes a resistive ladder outputting a plurality of reference voltages and a coarse ADC receiving the reference voltages and a voltage input. A plurality of coarse comparators receive an output of the coarse ADC. A switch matrix receives an output of the coarse ADC and the reference voltages. The switch matrix inputs a plurality of control signals for selecting at least two voltage subranges. A fine ADC receives the two voltage subranges and the voltage input. A plurality of fine comparators receive an output of the fine ADC. An encoder converts outputs of the coarse and fine comparators to a digital representation of the voltage input. The voltage subranges are adjacent. Each control signal includes a plurality of control lines for controlling corresponding switches. The switches are field effect transistors.
1. An autozero amplifier comprising:
a positive input terminal;
a negative input terminal;
a first capacitor connected to said positive input terminal;
a second capacitor connected to said negative input terminal;
a first pair of transistors with their corresponding drains connected to the first capacitor at a common node
wherein the source of a first transistor of said first pair of transistors is connected to a positive threshold voltage,
the source of a second of said first pair of transistors is connected to a positive voltage terminal of a resistor ladder,
and
the gates said first pair of transistors are connected to a non-overlapping two-phase clock;
and
a second pair of transistors with their drains connected to the second capacitor at a common node
wherein the source of a first of said second pair of transistors is connected to a negative threshold voltage,
the source of a second of said second pair of transistors is connected to a negative voltage terminal of said resistor ladder,
and
the gates said second pair of transistors are connected to said non-overlapping two-phase clock.
2. The autozero amplifier of claim 1 , wherein said autozero amplifier is used in a programmable gain amplifier.
3. The autozero amplifier of claim 1 , wherein said autozero amplifier is used in a digital to analog converter (DAC).
4. The autozero amplifier of claim 1 wherein said amplifier is used in a coarse analog to digital converter.
5. The autozero amplifier of claim 1 , wherein said autozero amplifier is part of an array of autozero amplifiers.