IP Library Granted Patent US 7,265,575
Granted Patent B2
US 7,265,575 · App. 11/653,673 · Granted Sep 4, 2007

Nanotube-based logic driver circuits

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Quick Facts
Patent No.
US 7,265,575
App. No.
11/653,673
Granted
Sep 4, 2007
Kind
B2
Abstract

Nanotube based logic driver circuits. These include pull-up driver circuits, push-pull driver circuits, tristate driver circuits, among others. Under one embodiment, an off-chip driver circuit includes a differential input having first and second signal links, each coupled to a respective one of two differential, on-chip signals. At least one output link is connectable to an off-chip impedance load, and at least one switching element has an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The input node is coupled to a reference signal and the control structure is coupled to the first and second signal links. The output node is coupled to the output link, and the channel element is sized to carry sufficient current to drive said off-chip impedance load.

Claims (17)

1. A driver for a load, the driver comprising:

first and second input nodes;

a switching element, the switching element comprising:

a control electrode in electrical communication with the first input node;

a release electrode in electrical communication with the second input node;

an output node in electrical communication with the load; and

a nanotube element constructed and arranged to electrically contact the output node and thus the load in response to a control signal on the first input node, and to be out of electrical contact with the output node and thus the load in response to a release signal on the second input node,

wherein, when the nanotube element electrically contacts the output node, one or more pre-selected electrical characteristics of the switching element are sufficient to drive the load.

2. The driver of claim 1 , wherein the first and second input nodes carry differential signals.

3. The driver of claim 1 , wherein, when the nanotube element electrically contacts the output node, the nanotube element provides a conductive pathway between the control electrode and the output node.

4. The driver of claim 1 , wherein the nanotube element is coupled to ground.

5. The driver of claim 1 , wherein the nanotube element is coupled to a supply voltage.

6. The driver of claim 1 , wherein the load has a capacitance of at least 10 pf.

7. The driver of claim 1 , wherein the nanotube element comprises a porous nanotube fabric.

8. The driver of claim 1 , wherein the one or more pre-selected electrical characteristics comprises at least one of an impedance, a capacitance, a resistance, and a current-carrying capacity.

9. The driver of claim 1 , wherein the release electrode comprises an insulator layer on a surface of the release electrode facing the nanotube element.

10. The driver of claim 1 , wherein the load comprises a logic circuit.

Assignments (2)
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2021
From: SILICON VALLEY BANK
To: NANTERO, INC.
Reel/Frame 056790/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Nov 11, 2020
From: NANTERO, INC.
To: SILICON VALLEY BANK
Reel/Frame 054383/0632 →