Method for forming MRAM bit having a bottom sense layer utilizing electroless plating
View Patent ↗The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor in a trench is provided in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a dielectric layer is deposited to a thickness slightly greater than the desired final thickness of a sense layer, which is formed later. The dielectric layer is then patterned and etched to form an opening for the cell shapes over the first conductor. Then, a permalloy is electroplated in the cell shapes to form the sense layer. The sense layer and dielectric layer are flattened and then a nonmagnetic tunnel barrier layer is deposited. Finally, the pinned layer is formed over the tunnel barrier layer.
1. A method of forming a memory cell, the method comprising:
forming a conductive layer within an insulating layer;
forming a sense layer in openings that extend longitudinally over the conductive layer;
forming a nonmagnetic tunnel layer over the sense layer; and
forming a pinned layer over the nonmagnetic tunnel layer.
2. The method of claim 1 , further comprising the step of:
forming a dielectric layer over the conductive layer and the insulating layer.
3. The method of claim 1 , wherein forming the sense layer comprises electroplating the sense layer.
4. The method of claim 2 , further comprising the step of:
planarizing an upper surface of the sense layer and the dielectric layer.
5. The method of claim 4 , wherein the planarizing step is performed by chemical mechanical polishing.
6. The method of claim 4 , wherein the planarizing step is performed by sputtering.
7. The method of claim 2 , further comprising the step of:
patterning the pinned layer, the nonmagnetic tunnel layer and the dielectric layer to form the memory cell.
8. The method of claim 1 , wherein forming the sense layer comprises forming a plurality of layers to produce a ferromagnetic sense layer.
9. The method of claim 1 , wherein forming the pinned layer comprises forming a plurality of layers to produce a ferromagnetic pinned layer.
10. A method of forming a memory cell, the method comprising:
forming a conductive layer in a trench within an insulating layer;
forming a dielectric layer over the conductive layer and the insulating layer;
forming a first magnetic layer in openings that extend longitudinally over the conductive layer;
planarizing an upper surface of the first magnetic layer and the dielectric layer;
forming a nonmagnetic tunnel layer over the sense layer; and
forming a second magnetic layer over the nonmagnetic tunnel layer.
11. The method of claim 10 , wherein forming the first magnetic layer comprises forming the first magnetic layer by electroless plating.
12. The method of claim 10 , wherein the planarizing step is performed by chemical mechanical polishing.
13. The method of claim 10 , wherein the planarizing step is performed by sputtering.
14. The method of claim 10 , wherein forming the first magnetic layer comprises forming a plurality of layers to produce a ferromagnetic first magnetic layer.
15. The method of claim 10 , wherein forming the second magnetic layer comprises forming a plurality of layers to produce a ferromagnetic second magnetic layer.