IP Library Granted Patent US 8,076,718
Granted Patent B2
US 8,076,718 · App. 11/666,461 · Granted Dec 13, 2011

Insulated gate semiconductor device and method for producing the same

Assignees: Toyota Jidosha Kabushiki Kaisha; Denso Corporation
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Quick Facts
Patent No.
US 8,076,718
App. No.
11/666,461
Granted
Dec 13, 2011
Kind
B2
Abstract

The invention has an object to provide an insulation gate type semiconductor device and a method for producing the same in which high breakdown voltage and compactness are achieved. The semiconductor device has a gate trench and a P floating region formed in the cell area and has a terminal trench and a P floating region formed in the terminal area. In addition, a terminal trench of three terminal trenches has a structure similar to that of the gate trench, and the other terminal trenches have a structure in which an insulation substance such as oxide silicon is filled. Also, the P floating region 51 is an area formed by implanting impurities from the bottom surface of the gate trench, and the P floating region is an area formed by implanting impurities from the bottom surface of the terminal trench.

Claims (15)

1. An insulation gate type semiconductor device including a body region which is positioned on an upper surface inside a semiconductor substrate and is a first conductive type semiconductor; and a drift region which is in contact with the downward of the body region and is a second conductive type semiconductor; comprising:

a first trench portion group passing through the body region in the thickness direction of the semiconductor substrate, positioned in a cell area, and each gate trench of the first trench portion group internally incorporating a first gate electrode;

first floating regions enclosed by the drift region and surrounding a bottom portion of at least one trench portion in the first trench portion group, which is the first conductive type semiconductor;

a second trench portion group passing through the body region in the thickness direction of the semiconductor substrate, positioned in a terminal area surrounding the cell area, and formed to be annular so as to surround the cell area when being viewed from above; and

second floating regions enclosed by the drift region and surrounding a bottom portion of at least one trench portion in the second trench portion group, which is the first conductive type semiconductor;

wherein the semiconductor device is adapted such that electric field strength peak at two places in the semiconductor substrate in a thickness direction: at a PN junction between the first or second floating regions and the drift region; and at a PN junction between the body region and the drift region;

wherein a second gate electrode is internally incorporated in at least the innermost positioned trench portion in the second trench portion group;

wherein a lower end of the second gate electrode in the second trench portion group is equal to a lower end of the first gate electrode in the first trench group in a position in the substrate in the thickness direction.

2. The insulation gate type semiconductor device according to claim 1 , wherein at least the outermost positioned trench portion in the second trench portion group includes a gate-free structure.

3. The insulation gate type semiconductor device according to claim 1 , wherein the second gate electrode is internally incorporated in only the innermost positioned trench portion in the second trench portion group.

4. The insulation gate type semiconductor device according to claim 1 , wherein the pitches of respective trench portions in the second trench portion group are narrower than those of respective trench portions in the first trench portion group.

5. The insulation gate type semiconductor device according to claim 1 , wherein the inner trench portion of adjacent trench portions in the second trench portion group is deeper than the other.

6. The insulation gate type semiconductor device according to claim 1 , wherein trench portions of the second trench portion group are deeper than trench portions of the first trench portion group.

7. The insulation gate type semiconductor device according to claim 6 , wherein the width of trench portions of the second trench portion group is wider than the width of trench portions of the first trench portion group.

8. The insulation gate type semiconductor device according to claim 1 , wherein the body region extends laterally to the outermost trench portion in the second trench portion group at a maximum.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE FIRST LISTED ASSIGNEE'S ADRESS TO READ: 1, TOYOTA-CHO, TOYOTA-SHI AICHI-KEN, JAPAN 471-8571 PREVIOUSLY RECORDED ON REEL 019266 FRAME 0947. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNOR'S INTEREST. Recorded Jun 22, 2007
From: TAKAYA, HIDEFUMI; MIYAGI, KYOSUKE; KUROYANAGI, AKIRA; HAMADA, KIMIMORI; OKURA, YASUSHI; TOKURA, NORIHITO
To: TOYOTA JIDOSHI KABUSHIKI KAISHA; DENSO CORPORATION
Reel/Frame 019467/0157 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2007
From: TAKAYA, HIDEFUMI; MIYAGI, KYOSUKE; KUROYANAGI, AKIRA; HAMADA, KIMIMORI; OKURA, YASUSHI; TOKURA, NORIHITO
To: TOYOTA JIDOSHA KABUSHIKI KAISHA; DENSO CORPORATION
Reel/Frame 019266/0947 →
Priority Claims (1)
JP 2004-316912 · Oct 29, 2004 · national
Continuity (1)
Related Publication 20080087951A1 · Apr 17, 2008