Oscillator structure

1. An oscillator structure, comprising:

a sync signal processor comprising an input interface for an external clock based sync signal and an output interface configured to output a duty cycle indication signal depending on a signal property of the sync signal; and

an oscillator comprising an input interface configured to receive the duty cycle indication signal and the sync signal and an output interface configured to output an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.

2. The oscillator structure according to claim 1 , further comprising:

an internal oscillator comprising an output interface for an oscillation signal having a predetermined duty cycle; and

an oscillator selection circuit comprising an input interface for the sync signal and an output interface for an oscillator selection signal indicating an oscillator to be used.

3. The oscillator structure according to claim 2 , wherein the oscillator selection signal indicates the use of the oscillator when the sync signal is present, and wherein the oscillator selection signal indicates the use of the internal oscillator when the sync signal is absent.

4. The oscillator structure according to claim 2 , wherein the sync signal processor further comprises an output interface for a frequency indication signal depending on the signal property of the sync signal;

wherein the internal oscillator further comprises an input interface for the frequency indication signal, and wherein the frequency of the oscillation signal of the internal oscillator depends on the frequency indication signal.

5. The oscillator structure according to claim 4 , wherein the duty cycle indication signal indicates a first duty cycle when the property of the sync signal is below a predetermined threshold and a second duty cycle when the sync signal exceeds the predetermined threshold, and wherein

the frequency indication signal can indicate the same frequency when the property of the sync signal is below the threshold or exceeding the threshold.

6. The oscillator structure according to claim 5 , wherein the property of the sync signal is a current of the sync signal, and wherein a current of the frequency indication signal and the current of the sync signal comprise a first ratio when the current of the sync signal is below the threshold and a second ratio when the current of the sync signal exceeds the threshold.

7. The oscillator structure according to claim 1 wherein the duty cycle indication signal indicates a first duty cycle when the property of the sync signal is below a predetermined threshold and a second duty cycle, when the property exceeds the predetermined threshold.

8. the oscillator structure according to claim 7 , wherein the property of the sync signal is a voltage of the sync signal.

9. The oscillator structure according to claim 2 , further comprising a switching time calculator comprising an input interface for the oscillator selection signal and an output interface for a transition time signal, such that a combined oscillation signal combined concatenating the oscillation signal of the oscillator or the oscillation signal of the internal oscillator and the oscillation signal of the oscillator indicated by the oscillator selection signal at a time indicated by the transition time signal has a duty cycle below a predetermined duty cycle threshold.

10. The oscillator structure according to claim 9 , wherein the duty cycle threshold is the duty cycle of the oscillation signal of the oscillator or the duty cycle of the oscillation signal of the internal oscillator.

11. The oscillator structure according to claim 9 , wherein the transition time signal indicates the time of a falling edge of the oscillation signal of the oscillator indicated by the oscillator selection signal.

12. The oscillator structure according to claim 1 , wherein the oscillator comprises:

a first oscillator circuit comprising an input interface for the sync signal and an output interface for an intermediate oscillation signal having a duty cycle adjusted according to the duty cycle indication signal; and

a second oscillator circuit comprising an input interface for the sync signal and the intermediate oscillation signal and an output interface for the oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal, the oscillation signal synchronized with the external clock depending on the intermediate oscillation signal.

13. The oscillator structure according to claim 12 , wherein the oscillation signal synchronized with the external clock comprises an initial active phase and an extended active phase, the initial active phase being synchronized with the sync signal and the extended active phase extending the initial active phase at a time synchronized with a falling edge of the intermediate oscillation signal.

14. An oscillator structure, comprising:

a sync signal processor comprising an input interface for an external clock based sync signal and an output interface configured to output a duty cycle indication signal depending on a signal property of the sync signal; and

an oscillator comprising an input interface configured to receive the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal, wherein the duty cycle indication signal indicates a first duty cycle when a property of the sync signal is below a predetermined threshold and a second duty cycle when the property exceeds the predetermined threshold.

15. Means for generating an oscillator structure output signal, comprising:

means for processing an external clock based sync signal to derive a duty cycle indication signal depending on a signal property of the sync signal; and

oscillating means for receiving the duty cycle indication signal and the sync signal, and for deriving the oscillator structure output signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.

16. A method for generating an oscillation signal, the method comprising:

processing an external clock based sync signal to derive a duty cycle indication signal depending on a signal property of the sync signal;

generating the oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal;

generating an internal oscillation signal having a predetermined duty cycle;

processing the sync signal to derive an oscillation selection signal indicating an oscillation signal to be used; and

calculating a switching time, such that a combined oscillation signal combined concatenating the oscillation signal synchronized with the external clock or the internal oscillation signal and the oscillation signal indicated by the oscillation selection signal at the switching time has a duty cycle below a predetermined duty cycle threshold.

17. The method according to claim 16 , the method further comprising the steps of:

using the oscillation signal synchronized with the external clock or the internal oscillation signal as the oscillation signal, depending on the oscillation selection signal.

18. The method according to claim 17 , the method further comprising the steps of:

indicating the use of the oscillation signal synchronized with the external clock when the sync signal is present; and

indicating the use of the internal oscillation signal when the sync signal is absent.

19. The method according to claim 17 , the method further comprising the steps of:

deriving a frequency indication signal depending on the signal property of the sync signal; and

adjusting the frequency of the internal oscillation signal depending on the frequency indication signal.

20. The method according to claim 19 , wherein an oscillation signal synchronized with the external clock having a first duty cycle is derived when the property of the sync signal is below a predetermined threshold and an oscillation signal synchronized with the external clock having a second duty cycle is derived when the sync signal exceeds the predetermined threshold, and wherein

the same frequency indication signal can be derived when the property of the sync signal is below the threshold or exceeding the threshold.

21. The method according to claim 16 , wherein an oscillation signal synchronized with the external clock having a first duty cycle is derived when the property of the sync signal is below a predetermined threshold and an oscillation signal synchronized with the external clock having a second duty cycle is derived when the sync signal exceeds the predetermined threshold.

22. The method according to claim 16 , wherein the switching time is calculated such that the switching time is synchronized with a falling edge of the oscillation signal indicated by the oscillation selection signal.

23. The method according to claim 16 , further comprising the steps of:

generating an intermediate oscillation signal having a duty cycle adjusted according to the duty cycle indication signal; and

generating the oscillation signal synchronized with the external clock by concatenating an initial active signal phase and an extended active signal phase, the initial active signal phase being synchronized with the sync signal and the extended active signal phase being synchronized with a falling edge of the intermediate oscillation signal.

24. An oscillator system, comprising:

an oscillator structure, comprising:

a sync signal processor comprising an input interface for an external clock based sync signal and an output interface configured to output a duty cycle indication signal depending on a signal property of the sync signal; and

an oscillator comprising an input interface configured to receive the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal; and

a sync signal generator comprising an input interface for the external clock signal and an output interface for the sync signal, wherein the sync signal has a first signal component having a predetermined signal property and a second signal component synchronized with the external clock signal.