Nitride semiconductor device and method of manufacturing the same
View Patent ↗The present invention provides a nitride semiconductor device. The nitride semiconductor device comprises an n-type nitride semiconductor layer formed on a nitride crystal growth substrate. An active layer is formed on the n-type nitride semiconductor layer. A first p-type nitride semiconductor layer is formed on the active layer. A micro-structured current diffusion pattern is formed on the first p-type nitride semiconductor layer. The current diffusion pattern is made of an insulation material. A second p-type nitride semiconductor layer is formed on the first p-type nitride semiconductor layer having the current diffusion pattern formed thereon.
1. A method of manufacturing a nitride semiconductor device by means of vapor deposition, the method comprising the steps of:
forming an n-type nitride semiconductor layer on a nitride crystal growth substrate;
forming an active layer on the n-type nitride semiconductor layer;
forming a first p-type nitride semiconductor layer on the active layer;
forming a micro-structured current diffusion pattern on the first p-type nitride semiconductor layer, the current diffusion pattern being made of an insulation material;
forming a second p-type nitride semiconductor layer on the first p-type nitride semiconductor layer having the current diffusion pattern formed thereon;
forming a mask pattern on the upper surface of the second p-type nitride semiconductor layer in the same manner as the current diffusion pattern; and
etching the upper surface of the second p-type nitride semiconductor layer through the use of the mask pattern.
2. The method as set forth in claim 1 , wherein the current diffusion pattern forming step comprises the sub-step of:
forming a silicon nitride (SiN x ) arranged in a nano-sized dot structure.
3. The method as set forth in claim 2 , wherein the current diffusion pattern forming step comprises the sub-step of:
supplying silane or tetraethylsilane and ammonia gas to form a silicon nitride pattern having a nano-sized dot structure.
4. The method as set forth in claim 1 , wherein the thickness of each of the first and second p-type nitride semiconductor layers is approximately 50 Å to 2000 Å.
5. A method of manufacturing a nitride semiconductor device by means of vapor deposition, the method comprising the steps of:
forming an n-type nitride semiconductor layer on a nitride crystal growth substrate;
forming an active layer on the n-type nitride semiconductor layer;
forming a first p-type nitride semiconductor layer on the active layer;
forming a micro-structured current diffusion pattern on the first p-type nitride semiconductor layer, the current diffusion pattern being made of an insulation material; and
forming a second p-type nitride semiconductor layer on the first p-type nitride semiconductor layer having the current diffusion pattern formed thereon;
wherein the thickness of the current diffusion pattern is not more than approximately 10 Å.
6. A method of manufacturing a nitride semiconductor device by means of vapor deposition, the method comprising the steps of:
forming an n-type nitride semiconductor layer on a nitride crystal growth substrate;
forming an active layer on the n-type nitride semiconductor layer;
forming a first p-type nitride semiconductor layer on the active layer;
forming a micro-structured current diffusion pattern on the first p-type nitride semiconductor layer, the current diffusion pattern being made of an insulation material; and
forming a second p-type nitride semiconductor layer on the first p-type nitride semiconductor layer having the current diffusion pattern formed thereon;
wherein the n-type nitride semiconductor layer forming step comprises the sub-steps of:
forming a first n-type nitride semiconductor layer on the upper surface of the substrate;
forming a silicon nitride pattern on the first n-type nitride semiconductor layer, the silicon nitride pattern being arranged in a nano-sized dot structure; and
forming a second n-type nitride semiconductor layer on the first n-type nitride semiconductor layer having the silicon nitride pattern formed thereon.