Small form factor PCBA process carrier
View Patent ↗A process carrier is capable of supporting printed circuit boards during manufacturing and testing. The process carrier includes a base plate, a first top plate and a second top plate. The base plate has an upper surface including a recessed area sized to receive a panelized group of printed circuit board substrates and a lower surface. The first top plate is coupleable to the upper surface of the base plate during a first manufacturing process. The first top plate includes a plurality of connected rails configured to secure the panelized group of printed circuit board substrates. The second top plate is coupleable to the upper surface of the base plate during a second manufacturing process. The second top plate is configured to cover the panelized group of printed circuit board substrates.
1. A process carrier capable of supporting printed circuit boards during manufacturing and testing, the process carrier comprising:
a base plate having an upper surface and a lower surface, the upper surface including a recessed area sized to receive a plurality of printed circuit board substrates that are coupled together to form a panelized group;
a first top plate removably coupled to the upper surface of the base plate during a first manufacturing process, the first top plate including a plurality of connected rails configured to secure the panelized group of printed circuit board substrates; and
a second top plate removably coupled to the upper surface of the base plate during a second manufacturing process, the second top plate configured to cover the panelized group of printed circuit board substrates.
2. The process carrier of claim 1 , wherein the recessed area has a depth substantially equal to a thickness of the panelized group of printed circuit board substrates such that an upper surface of the panelized group of printed circuit board substrates is substantially coplanar with a non-recessed area of the upper surface of the base plate when the panelized group of printed circuit board substrates are received in the recessed area.
3. The process carrier of claim 1 , further comprising a plurality of uniformly dispersed perforations extending between the upper surface and the lower surface of the base plate.
4. The process carrier of claim 1 , further comprising a plurality of test point openings extending between the upper surface and the lower surface of the base plate to access test pads coupled to the printed circuit board substrates.
5. The process carrier of claim 1 , wherein the plurality of rails of the first top plate extend along and secure peripheral edges of each of the panelized group of printed circuit board substrates to the base plate.
6. The process carrier of claim 1 , wherein the plurality of connected rails include a lower surface, the lower surface having a plurality of notches formed thereon to promote air flow between the first top plate and the panelized group of printed circuit board substrates.
7. The process carrier of claim 1 , wherein the first top plate includes a plurality of openings formed between an upper surface of the rails and the lower surface of the rails and at corners thereof for receiving fasteners to secure the first top plate to the base plate.
8. The process carrier of claim 1 , wherein the second top plate comprises a continuous upper surface for covering the panelized group of printed circuit board substrates.
9. The process carrier of claim 8 , wherein the second top plate comprises a plurality of cavities formed on a lower surface of the second top plate, wherein each cavity is configured to cover each of the panelized group of printed circuit board substrates located in the recessed area of the upper surface of the base plate.
10. The process carrier of claim 9 , wherein the second top plate includes a plurality of openings formed between the upper surface and the lower surface of the second top plate and at corners thereof for receiving fasteners to secure the second top plate to the base plate.
11. The process carrier of claim 1 , wherein the first manufacturing process comprises placing surface mount devices to each of the panelized group of printed circuit board substrates and bonding the surface mount devices to each of the panelized group of printed circuit board substrates.
12. The process carrier of claim 11 , wherein bonding of the surface mount device includes bonding the surface mount device with an infrared reflow process.
13. The process carrier of claim 1 , wherein the second manufacturing process comprises testing each of the printed circuit board substrates having the surface mount devices by accessing test pads on each printed circuit board substrate through test point openings that are formed in the recessed area of the base plate.
14. The process carrier of claim 3 , wherein the plurality of perforations are located in the recessed area of the upper surface and located in a non-recessed area of the upper surface.
15. The process carrier of claim 4 , wherein the test openings are located in the recessed area of the upper surface.
16. A process carrier capable of supporting printed circuit boards during manufacturing and testing, the process carrier comprising:
a base plate including:
a lower surface;
an upper surface having a recessed area sized to receive a plurality of printed circuit board substrates coupled together to form a panelized group;
a plurality of perforations extending between the upper surface and the lower surface of the base plate to promote airflow to the printed circuit boards substrates;
a plurality of test openings extending between the upper surface and the lower surface of the base plate to access test pads on each printed circuit boards substrate; and
a first top plate removably coupled to the upper surface of the base plate during a first manufacturing process, the first top plate including a plurality of connected rails configured to secure the panelized group of printed circuit board substrates.
17. The process carrier of claim 16 , wherein the first manufacturing process comprises placing surface mount devices to each of the panelized group of printed circuit board substrates and bonding the surface mount devices to each of the panelized group of printed circuit board substrates.
18. The process carrier of claim 16 , further comprising a second top plate coupleable to the upper surface of the base plate during a second manufacturing process, the second top plate configured to cover the panelized group of printed circuit board substrates.
19. The process carrier of claim 18 , wherein the second manufacturing process comprises testing each of the printed circuit board substrates having the surface mount devices by accessing test pads on each printed circuit board substrate through test point openings that are formed in the recessed area of the base plate.