MEMORY CELL COMPRISING A DIODE FABRICATED IN A LOW RESISTIVITY, PROGRAMMED STATE

1 . A nonvolatile memory device comprising at least one memory cell which consists essentially of a diode and electrically conductive electrodes contacting the diode, wherein the diode is fabricated in a low resistivity, programmed state.

2 . The device of claim 1 , wherein the memory cell does not include any active or passive device except the diode.

3 . The device of claim 1 , wherein the memory cell does not include a transistor, a capacitor, a resistor, a fuse, an antifuse, a charge storage material, a phase change material or a resistivity change material.

4 . The device of claim 1 , wherein the memory cell comprises a read/write memory cell.

5 . The device of claim 1 , wherein the diode comprises a p-i-n semiconductor diode which acts as a read/write element of the memory cell.

6 . The device of claim 5 , wherein in use, the diode acts as a read/write element of the memory cell by switching from a first resistivity state to a second resistivity state different from the first resistivity state in response to an applied bias.

7 . The device of claim 1 , wherein the memory cell comprises a rewritable memory cell.

8 . The device of claim 7 , wherein the programmed diode is adapted to be placed in a high resistivity, unprogrammed state by an application of a reverse bias to the diode having a value greater than a predetermined critical voltage value.

9 . The device of claim 8 , wherein the unprogrammed diode is adapted to be returned to the low resistivity, programmed state by an application of a forward bias to the diode.

10 . The device of claim 1 , wherein:

the diode comprises a polycrystalline silicon, germanium or silicon-germanium p-i-n pillar diode having a substantially cylindrical shape, and

at least one electrode comprises a titanium silicide, titanium germanide or titanium silicide-germanide layer in contact with the diode; and

the titanium silicide, titanium germanide or titanium silicide-germanide layer comprises a C 49 phase.

11 . The device of claim 1 , further comprising a monolithic, three dimensional array of memory cells located over the diode.

12 . A nonvolatile memory device, comprising a plurality of memory cells, wherein each memory cell comprises:

a first electrode;

a polycrystalline silicon, germanium or silicon-germanium diode electrically contacting the first electrode; and

a second electrode electrically contacting the diode,

wherein the second electrode comprises a titanium silicide, titanium germanide or titanium silicide-germanide layer having a C 49 phase which physically contacts the diode.

13 . The device of claim 12 , wherein:

each memory cell consist essentially of the first electrode, the diode and the second electrode;

each memory cell does not include any active or passive devices except the diode; and

the memory cell comprises a read/write memory cell.

14 . The device of claim 13 , wherein the diode comprises a polycrystalline silicon, germanium or silicon-germanium p-i-n semiconductor diode, which in use acts as a read/write element of each memory cell by switching from a first resistivity state to a second resistivity state different from the first resistivity state in response to an applied bias.

15 . The device of claim 14 , wherein:

the diode comprises a pillar which has a substantially cylindrical shape;

the diode is fabricated in a low resistivity, programmed state;

the diode is adapted to be placed in a high resistivity, unprogrammed state by an application of a reverse bias to the diode having a value greater than a predetermined critical voltage value; and

the unprogrammed diode is adapted to be placed in the low resistivity, programmed state by an application of a forward bias to the diode.

16 . The device of claim 12 , further comprising a monolithic, three dimensional array of memory cells located over the diode.

17 . A nonvolatile memory device comprising:

a read/write memory cell comprising a first electrode, a diode which is fabricated in a low resistivity programmed state, and a second electrode; and

a means for applying a reverse bias above the diode's critical voltage value to the diode to switch the diode from the low resistivity programmed state to a high resistivity, unprogrammed state, and for applying a forward bias to the diode to switch the diode to the low resistivity, programmed state.

18 . The device of claim 17 , wherein:

the memory cell does not include any active or passive device except the diode; and

the first means comprises a driver circuit.

19 . The device of claim 17 , wherein:

the diode comprises a p-i-n semiconductor diode which is fabricated in the low resistivity, programmed state; and

the diode acts as a read/write element of the memory cell by switching from one of the high or the low resistivity states to different one of the high or the low resistivity states in response to an applied bias.

20 . The device of claim 19 , wherein:

the diode comprises a polycrystalline silicon, germanium or silicon-germnanium diode having a substantially cylindrical shape;

the second electrode comprises a titanium silicide, titanium germanide or titanium silicide-germanide layer in contact with the diode; and

the titanium silicide, titanium germanide or titanium silicide-germanide layer comprises a C 49 phase.

21 . The device of claim 17 , further comprising a monolithic, three dimensional array of memory cells located over the diode.