Semiconductor apparatus with decoupling capacitor
View Patent ↗A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.
1. A semiconductor apparatus, comprising:
an organic material substrate;
a die pad formed on the organic material substrate and comprised of first and second areas on which a semiconductor chip is mounted;
ground terminals which are to be grounded;
power supply terminals which are supplied with electrical power;
first conductive patterns which are formed on the organic material substrate and are connected to the ground terminals and the first area of the die pad;
second conductive patterns which are formed on the organic material substrate and are connected to the power supply terminals and the second area of the die pad; and
chip capacitors which are arranged so that a decoupling capacitor is provided,
wherein the organic material substrate is provided with cavities at a region between the first and second areas of the die pad, and the chip capacitors are arranged in the cavities.
2. The semiconductor apparatus according to claim 1 , wherein the die pad is divided into two areas.
3. The semiconductor apparatus according to claim 1 , wherein each cavity has a bottom and wherein the semiconductor apparatus further comprises a chip capacitor mounting pad provided at the bottom of each of the cavities of the organic material substrate.
4. The semiconductor apparatus according to claim 1 , wherein each of the chip capacitors has a capacity ranging from 0.1 to 1.0 micro F (μF).
5. The semiconductor apparatus according to claim 1 , wherein the first and the second conductive patterns are made of copper.