Semiconductor device and method manufacturing semiconductor device

1. A method of manufacturing a semiconductor device comprising:

forming a plurality of fins made of a semiconductor material on an insulating layer;

forming a gate insulating film on side surfaces of the plurality of fins; and

forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface,

wherein the forming of the gate electrode comprises:

forming the gate electrode on the gate insulating film of the first fin in a film thickness of not less than ½ of a spacing between the first fins which are adjacent to each other,

removing the gate electrode in a region of the second fin, and

forming the gate electrode on the gate insulating film of the second fin in a film thickness of less than ½ of a spacing between the second fins which are adjacent to each other.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the side surface of the first fin and the side surface of the second fin are each a crystal plane with a (100) orientation.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein the side surface of the first fin is a crystal plane with a (100) orientation, and the side surface of the second fin is a crystal plane with a (110) orientation.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein a first gate electrode made of an expansive material is buried by a damascene process on the gate insulating film of the side surface of the first fin, and

a second gate electrode made of a contractive material is buried by a damascene process on the gate insulating film of the side surface of the second fin.

5. A method of manufacturing a semiconductor device comprising:

forming a plurality of fins made of a semiconductor material on an insulating layer;

forming a gate insulating film on side surfaces of the plurality of fins; and

forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface,

wherein a spacing between the second fins which are adjacent to each other is larger than between the first fins which are adjacent to each other, and

in the formation of the gate electrode, the gate electrode is formed on the gate insulating film in a film thickness of not less than ½ of a spacing between the first fins which are adjacent to each other and less than ½ of a spacing between the second fins which are adjacent to each other.

6. The method of manufacturing a semiconductor device according to claim 5 , wherein the side surface of the first fin and the side surface of the second fin are each a crystal plane with a (100) orientation.

7. The method of manufacturing a semiconductor device according to claim 5 , wherein the side surface of the first fin is a crystal plane with a (100) orientation, and the side surface of the second fin is a crystal plane with a (110) orientation.

8. The method of manufacturing a semiconductor device according to claim 5 , wherein a first gate electrode made of an expansive material is buried by a damascene process on the gate insulating film of the side surface of the first fin, and

a second gate electrode made of a contractive material is buried by a damascene process on the gate insulating film of the side surface of the second fin.

9. A semiconductor device comprising:

an insulating layer;

a plurality of fins made of a semiconductor material on the insulating layer;

a gate insulating film provided on side surfaces of the plurality of fins; and

a gate electrode on the gate insulating film, the gate electrode applying a compressive stress to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and applying a tensile stress to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface,

wherein the gate electrode is filled in a spacing between the first fins which are adjacent to each other in a section perpendicular to the side surface of the first fins, and

the gate electrode is not filled in a spacing between the second fins which are adjacent to each other in a section perpendicular to the side surface of the second fins and is formed to provide a gap.

10. The semiconductor device according to claim 9 , wherein the side surface of the first fin and the side surface of the second fin are each a crystal plane with a (100) orientation.

11. The semiconductor device according to claim 9 , wherein the side surface of the first fin is a crystal plane with a (100) orientation, the side surface of the second fin is a crystal plane with a (110) orientation.

12. The semiconductor device according to claim 9 , wherein the gate electrode includes a first gate electrode made of an expansive material and buried on the gate insulating film of the side surface of the first fin, and includes a second gate electrode made of a contractive material and buried on the gate insulating film of the side surface of the second fin.