Method and apparatus for performing physical synthesis hill-climbing on multi-processor machines

1. A method for designing a system on a target device, comprising:

synthesizing the system;

mapping the system;

placing the system on the target device;

routing the system; and

performing physical synthesis on the system where a first descendant thread is spawned to run in parallel with an existing thread where the first descendant thread is executing a different optimization strategy than the existing thread but on a same netlist as the existing thread.

2. The method of claim 1 , wherein the first descendant thread is spawned in response to evaluating a cost function.

3. The method of claim 2 , wherein the cost function reflects an expected compile time reduction.

4. The method of claim 3 , wherein the expected compile time reduction is generated from a probability of success for an iteration using an optimization strategy of the existing thread.

5. The method of claim 3 , wherein the expected compile time reduction is generated from an estimated time to execute an iteration using an optimization strategy of the existing thread.

6. The method of claim 3 , wherein the expected compile time reduction is generated from a number of iterations remaining to be performed by the existing thread.

7. The method of claim 3 , wherein the expected compile time reduction is generated from a remaining number of hill-climbing iterations allowable for the existing thread.

8. The method of claim 1 , further comprising terminating the first descendant thread if the existing thread generates an improved solution after an iteration.

9. The method of claim 1 , further comprising terminating the first descendant thread if the existing thread is terminated.

10. The method of claim 1 , further comprising spawning a second descendant thread from the first descendant thread to run in parallel with the first descendant thread where the second descendant thread is executing a different optimization strategy on the same netlist as the existing thread.

11. The method of claim 1 , wherein the optimization strategy may include one of incremental retiming, resynthesis, logic replication, and local rewiring.

12. The method of claim 1 , wherein performing physical synthesis comprises perform a series of circuit transformations on the system.

13. The method of claim 1 , further comprising generating a data file that includes results from performing physical synthesis that may be used by another computer system to program the target device.

14. The method of claim 1 , further comprising terminating a thread when either a maximum number of iterations have been performed by the thread or when a strategy change is appropriate.

15. The method of claim 1 , further comprising outputting a data file that includes results generated from the physical synthesis.

16. An article of manufacture comprising a machine accessible medium including sequences of instructions, the sequences of instructions including instructions which when executed cause the machine to perform:

synthesizing the system;

mapping the system;

placing the system on the target device;

routing the system; and

performing physical synthesis on the system where a descendant thread is spawned to run in parallel with an existing thread where the descendant thread is executing a different optimization strategy than the existing thread but on a same netlist as the existing thread.

17. The article of manufacture of claim 16 , wherein the descendant thread is spawned in response to evaluating a cost function.

18. The article of manufacture of claim 17 , wherein the cost function reflects an expected compile time reduction.

19. The article of manufacture of claim 18 , wherein the expected compile time reduction is estimated from a probability of success for an iteration using an optimization strategy of the existing thread.

20. A hill-climbing management unit, comprising:

an optimization unit to perform circuit transformations in a system to optimize the system;

an evaluation unit to evaluate a solution generated by the optimization unit;

a hill-climbing management unit to direct a strategy change to be utilized by the optimization unit in response to the evaluation unit; and

a thread management unit to determine when to spawn a descendant thread to run in parallel with an existing thread where the descendant thread is executing a different optimization strategy than the existing thread but on a same netlist as the existing thread.

21. The apparatus of claim 20 , wherein the thread management unit spawns the descendant thread in response to a cost function that reflects an expected compile time reduction.

22. The apparatus of claim 21 , wherein the expected compile time reduction is estimated from a probability of success for an iteration using an optimization strategy of the existing thread.

23. The apparatus of claim 21 , wherein the expected compile time reduction is estimated from an estimated time to execute an iteration using an optimization strategy of the existing thread.

24. The apparatus of claim 21 , wherein the expected compile time reduction is estimated from a number of iterations remaining to be performed by the existing thread.

25. The apparatus of claim 21 , wherein the expected compile time reduction is estimated from a remaining number of hill-climbing iterations allowable for the existing thread.

26. The apparatus of claim 20 , wherein the thread management unit terminates the first descendant thread if the existing thread generates an improved solution after an iteration.

27. The apparatus of claim 20 , wherein the thread management unit terminates a thread when either a maximum number of iterations have been performed by a thread or when the hill-climbing management unit directs a strategy change to be utilized by the optimization unit.