Granted Patent B2

US 7,420,866 · App. 11/717,350 · Granted Sep 2, 2008

Abstract

Claims (48)

1. An integrated circuit, comprising:

an output pin to provide an output voltage to a non-volatile memory;

a memory to store a table including a plurality of operating voltage levels; and

a voltage mode module to apply a first voltage at a first of the plurality of operating voltage levels at the output pin for use in determining an operating voltage level for the non-volatile memory.

2. The integrated circuit of claim 1 , wherein the voltage mode module is to apply a second voltage at a second of the plurality of operating voltage levels at the output pin.

3. The integrated circuit of claim 1 , wherein the voltage mode module is to apply a second voltage at a second of the plurality of operating voltage levels at the output pin in response to a first read operation.

4. An integrated circuit, comprising:

an output pin to provide an output voltage to a non-volatile memory;

a memory to store a table including a plurality of operating voltage levels; and

a voltage mode module to apply a first voltage at a first of the plurality of operating voltage levels at the output pin, wherein the voltage mode module is to apply a second voltage at a second of the plurality of operating voltage levels at the output pin in response to a first read operation returning a failure condition.

5. An integrated circuit, comprising:

an output pin to provide an output voltage to a non-volatile memory;

a memory to store a table including a plurality of operating voltage levels;

a voltage mode module to apply a first voltage at a first of the plurality of operating voltage levels at the output pin, wherein the voltage mode module is to apply a second voltage at a second of the plurality of operating voltage levels at the output pin;

an input pin;

a voltage converter to produce an output voltage at The output pin based on an input voltage received at the input pin.

6. The integrated circuit of claim 5 , further comprising:

control logic responsive to the voltage mode module to control a conversion mode of the voltage converter.

7. An integrated circuit, comprising:

an output pin to provide an output voltage to a non-volatile memory;

a memory to store a table including a plurality of operating voltage levels; and

a voltage mode module to apply a first voltage at a first of the plurality of operating voltage levels at the output pin, wherein the voltage mode module is to apply a second voltage at a second of the plurality of operating voltage levels at the output pin, wherein the voltage mode module is to apply a third voltage at a third of the plurality of operating voltage levels at the output pin.

8. The integrated circuit of claim 7 , wherein the voltage mode module is to apply the third voltage in response to a second read operation of the non-volatile memory.

9. The integrated circuit of claim 7 , wherein the voltage mode module is to apply the third voltage in response to a second read operation of the non-volatile memory returning a failure condition.

10. The integrated circuit of claim 5 , wherein the input voltage is applied via a universal serial bus (USB) connection.

11. The integrated circuit of claim 3 , further comprising a table of non-volatile memory devices stored in the memory.

12. The integrated circuit of claim 11 , wherein the table of non-volatile memory devices includes a plurality of entries, each entry in the plurality of entries associated with an expected result of the first read operation.

13. The integrated circuit of claim 1 , wherein the integrated circuit does not include a dedicated non-volatile memory voltage detection pin.

14. A method comprising:

providing a first voltage at a first voltage level to a non-volatile memory;

receiving a first input in response to a first read operation being performed on the non-volatile memory;

determining a first result of the first read operation based on the first input;

comparing the first result to an expected result; and

providing a second voltage at a second voltage level to the non-volatile memory based on comparing the first result to an expected result.

15. The method of claim 14 , further comprising:

switching a conversion mode of a voltage converter after comparing the first result to the expected result.

16. The method of claim 14 , further comprising comparing the first result to at least one entry in a table that is associated with the expected result of the first read operation.

17. The method of claim 14 , further comprising providing the second voltage at the second voltage level to the non-volatile memory in response to a failure condition of the first read operation.

18. The method of claim 14 , wherein the first voltage level is about 1.8 volts and the second voltage level is about 3.3 volts.

19. The method of claim 14 , wherein the non-volatile memory is a NAND flash memory.

20. The method of claim 14 , wherein the first voltage level is based on a battery voltage level.

21. The method of claim 14 , further comprising:

performing a second read operation on the non-volatile memory;

determining a memory instruction based on a second result of the second read operation.

22. The method of claim 21 , wherein the second result of the second read operation includes device identification data.

23. The method of claim 22 , wherein the device identification data is associated with a manufacturer of the non-volatile memory.

24. The method of claim 14 , further comprising applying a third voltage at a third voltage level in response to a second read operation on the non-volatile memory.

25. The method of claim 24 , further comprising providing the third voltage at the third voltage level to the non-volatile memory in response to a failure condition of the second read operation.

Assignments (23)