Robust driver for high intensity discharge lamp

1. Circuit arrangement for operating a high intensity discharge lamp, said circuit arrangement comprising

regulable converter means adapted to generate a current regulable in magnitude out of a supply voltage,

commutator means for commutating the current and comprising lamp connection terminals,

setpoint signal generator means adapted to generate a principal setpoint signal for said current,

correctional setpoint signal generator means adapted to generate a correctional setpoint signal adjusting said principal setpoint signal to form a corrected setpoint signal, said correctional setpoint signal generator means comprising

memory means,

output means for said correctional setpoint signal,

input means adapted to acquire an input signal, and

calculation means adapted to periodically recalculate said correctional setpoint signal

based on said input signal and a signal stored in said memory means,

and said circuit arrangement furthermore comprising phase synchronization means adapted to synchronize said correctional setpoint signal generator to said principal setpoint signal.

2. Circuit arrangement according to claim 1 , wherein said signal stored in said memory means is said correctional setpoint signal of a current period, said correctional setpoint signal generator thus being adapted to perform an iterative calculation of said correctional setpoint signal.

3. Circuit arrangement according to claim 2 , wherein said calculation means are adapted to accept as input:

said correctional setpoint signal of said current period from said memory means, and

an average signal of an actual output current from said memory means, said actual output current being the current flowing through said high intensity discharge lamp and corresponding to said input signal to said input means, and said average signal being calculated by superposing and scaling the actual output current signal of at least one of said current period and one or more prior periods.

4. Circuit arrangement according to claim 1 , wherein said memory means store update matrices L u and L y for said iterative calculation.

5. Circuit arrangement according to claim 4 , wherein said calculation means are adapted to calculate a difference signal of said principal setpoint signal and said signal corresponding to said actual output current.

6. Circuit arrangement according to claim 5 , wherein

said principal setpoint signal,

said correctional setpoint signal,

said signal corresponding to said actual output current, and

said signal stored in said memory means,

are respectively represented by

a discrete sequence of said principal setpoint signal,

a discrete sequence of said correctional setpoint signal,

a discrete sequence of said signal corresponding to said actual output current, and

a discrete sequence of said signal stored in said memory means,

each discrete sequence representing the respective signal by means of a plurality of values, each value corresponding to an instantaneous value of the respective signal at a particular instance.

7. Circuit arrangement according to claim 6 , wherein said iterative calculation performed by said calculating means obeys the equations

Δ U k =L y ( R k −Y k )+ L u U k

U k+1 =U k +ΔU k

with, for a k-th period,

ΔU k being a discrete sequence of a variation of said correctional setpoint signal,

R k being a discrete sequence of said principal setpoint signal,

Y k being a discrete sequence of said actual output current,

U k and U k+1 being a discrete sequence of said correctional setpoint signal of said k-th period and a subsequent period k+1, respectively,

said update matrix L y being an operator for a sequence of said difference signal between R k and Y k , and

said update matrix L u , being an operator for said sequence of said correctional setpoint signal.

8. Circuit arrangement according to claim 7 , wherein said update matrices L y and L u , are determined from an estimation of system dynamics.

9. Circuit arrangement according to claim 4 , wherein said circuit arrangement further comprises a subsidiary feedback control.

10. Circuit arrangement according to claim 9 , wherein said subsidiary feedback control comprises a voltage feedback and/or a current feedback.

11. Circuit arrangement according to claim 1 , further comprising a summing point adapted to add said principal setpoint signal and said correctional signal to form said corrected setpoint signal.

12. Circuit arrangement according to claim 1 , wherein said memory means are adapted to store a feedforward table containing said correctional setpoint signal sequence corresponding to one period.

13. Circuit arrangement according to claim 1 , wherein said principal setpoint signal generator is adapted to generate a periodically repeating signal.

14. High intensity discharge lamp driver comprising a circuit arrangement according to claim 1 .

15. High intensity discharge lamp driver according to claim 14 , wherein said circuit arrangement is an add-on device.

16. High intensity discharge lamp driver comprising a circuit arrangement according to claim 1 as an add-on device.

17. Projection system comprising a high intensity discharge lamp and a circuit arrangement according to claim 1 .

18. Method for operating a high intensity discharge lamp driver, said method comprising:

generation of a principal setpoint signal for a given time period;

acquisition of a signal corresponding to an actual output current for said given time period;

determination of a difference signal between said principal setpoint signal and said actual output current signal for said given time period;

determination of a correctional setpoint signal for a subsequent time period of said given time period based on said difference signal;

adjustment of said principal setpoint signal with said correctional setpoint signal for said subsequent time period.

19. Method according to claim 18 , wherein said determination of said correctional setpoint signal is performed iteratively.

20. Method according to claim 19 , wherein said iterative determination is a function of an estimation of a dynamic of a controlled system, said system comprising said high intensity discharge lamp, a converter and a commutator.

21. Method according to claim 20 , wherein said iterative determination is a function of

said principal setpoint signal of said given time period,

said principal setpoint signal adjusted by said correctional setpoint signal of said given time period, an average signal of an actual output current flowing through said high intensity discharge lamp, said average signal being calculated by superposing and scaling the actual output current signal of at least one of said given time period and one or more prior time periods.

22. Method according to claim 21 , wherein said iterative determination further is a function of a combination of a plurality of empirically determined system dynamics.

23. Method according to claim 22 , wherein L y and L u are matrices determined from an estimation of system dynamics.

24. Method according to claim 22 , wherein said correctional setpoint signal sequence corresponding to one period is stored in a feedforward table.

25. Method according to claim 22 , wherein said controlled system further comprises a subsidiary feedback control.

26. Method according to claim 22 , wherein said correctional setpoint signal generator is an add-on to common high intensity discharge lamp drivers.

27. Method according to claim 20 , wherein

said principal setpoint signal,

said correctional setpoint signal,

said signal corresponding to said actual output current, and

a signal stored in a memory,

are represented by

a discrete sequence of said correctional setpoint signal,

a discrete sequence of said principal setpoint signal,

a discrete sequence of said signal corresponding to said actual output current, and

a discrete sequence of said signal stored in said memory,

respectively, each discrete sequence representing the respective signal by means of a plurality of values, each value corresponding to an instantaneous value of the respective signal at a particular instance.

28. Method according to claim 27 , wherein a periodically repeating signal is generated by a setpoint signal generator.

29. Method according to claim 28 , wherein said subsidiary feedback control comprises a voltage feedback and/or current feedback.

30. Method according to claim 27 , wherein said differential sequence of said two sequences of said principal setpoint signal and said signal corresponding to said actual output current asymptotically approaches a zero-sequence.

31. Method according to claim 21 , wherein said iterative determination obeys the equation

Δ U k =L y ( R k −Y k )+ L u U k

U k+1 =U k +ΔU k

with, for a k-th period:

ΔU k being a sequence of a variation of said correctional setpoint signal,

R k being a sequence of said principal setpoint signal,

Y k being a sequence of said actual output current signal,

U k and U k+1 being a discrete sequence of said correctional setpoint signal of said k-th period and a subsequent period k+1, respectively,

L y being an operator for a sequence of said difference signal, and

L u , being an operator for said sequence of said correctional setpoint signal.

32. Method according to claim 31 , further comprising the steps of:

measuring the system dynamics,

storing said measured system dynamics, and

deducting said operators L u and L y from said measured system dynamics.