IP Library Granted Patent US 8,402,288
Granted Patent B2
US 8,402,288 · App. 11/719,015 · Granted Mar 19, 2013

Apparatus and method for controlling voltage and frequency using multiple reference circuits

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,402,288
App. No.
11/719,015
Granted
Mar 19, 2013
Kind
B2
Abstract

A method and an apparatus for controlling voltage level and clock signal frequency supplied to a system. The method comprises: providing at least one reference circuit representative of a behavior of at least one estimated circuit, whereas the at least one estimated circuit includes transistors of multiple types; supplying at least one input signal to at least one reference circuits and monitoring a behavior of the at least one reference circuit one or more reference circuit; determining a characteristic of at least one output signal provided to the at least one estimated circuit; and providing at least one output signal to one or more estimated circuits The apparatus includes at least one reference circuit representative of a behavior of at least one estimated circuit, whereas the at least one estimated circuit includes transistors of multiple types; and monitoring circuitry adapted to monitor a behavior of at least one reference circuit and to determine a characteristic of at least one output signal provided to the at least one estimated circuit.

Claims (32)

1. A method for controlling voltage level and clock signal frequency supplied to a system, the method comprising:

providing at least one output signal to multiple estimated circuits;

providing at least one input signal to multiple reference circuits representative of a behavior of the multiple estimated circuits, whereas at least one estimated circuit comprises transistors of multiple types; wherein each of the multiple reference circuits represents a behavior of a single type of transistor, the multiple reference circuits belong to a hardware module that is coupled to the multiple estimated circuits, transistors of different types differ from each other by at least one characteristic out of: a threshold voltage and an amount of current driven by the transistor;

monitoring a behavior of the multiple reference circuits in response to the at least one input signal;

determining a characteristic of at least one output signal provided to the multiple estimated circuits; and

increasing the voltage level and the clock signal frequency if only a single reference circuit of the multiple reference circuits indicates that the voltage level and the clock signal frequency should be increased based on the characteristic of the at least one output signal;

decreasing the voltage level and the clock signal frequency if all reference circuits indicate that the voltage level and the clock signal frequency can be decreased based on the characteristic of the at least one output signal.

2. The method according to claim 1 wherein the monitoring comprises evaluating a delay of a transistor of a certain type.

3. The method according to claim 1 comprising evaluating an impedance of an input/output transistor of a ring oscillator and determining which transistors of an input/output module to activate to provide a desired impedance of the input/output module.

4. The method according to claim 1 wherein the transistors of different types differ by their threshold voltage.

5. The method according to claim 1 wherein the transistors of different types differ by an amount of current they drive.

6. The method according to claim 1 whereas the determining comprises applying a first policy for increasing the voltage level and clock signal frequency and applying a second policy for decreasing the voltage level and clock signal frequency.

7. The method according to claim 1 wherein the monitoring is executed by a hardware module.

8. The method according to claim 1 wherein the providing comprises configuring a supply source and a clock signal source.

9. An apparatus for controlling voltage level and clock signal frequency supplied to a system, the apparatus comprises:

a monitoring circuitry;

multiple reference circuits representative of a behavior of at least one of multiple estimated circuits, whereas the at least one of the multiple estimated circuits comprises transistors of multiple types; wherein each of the multiple reference circuits represents a behavior of a single type of transistor, the multiple reference circuits belong to a hardware module that is coupled to the multiple estimated circuits, and transistors of different types differ from each other by at least one characteristic out of: a threshold voltage and an amount of current driven by the transistor;

whereas the monitoring circuitry is adapted to monitor a behavior of at least one of the multiple reference circuits and to determine a characteristic of at least one output signal provided to the at least one of the estimated circuits; and

whereas the apparatus is adapted to increase the voltage level and the clock signal frequency if only a single reference circuit of the multiple reference circuits indicates that the voltage level and clock signal frequency should be increased based on the characteristic of the at least one output signal, and to decrease the voltage level and the clock signal frequency if all reference circuits indicate that the voltage level and clock signal frequency can be decreased based on the characteristic of the at least one output signal.

10. The apparatus according to claim 9 wherein the monitoring circuitry is adapted to evaluate a delay of a transistor of a certain type.

11. The apparatus according to claim 9 wherein the monitoring circuitry is adapted to evaluate an impedance of an input/output transistor of a certain type that belong to a ring oscillator and determine which transistors of an input/output module to activate to provide a desired impedance of the input/output module.

12. The apparatus according to claim 9 wherein the transistors of different types differ by their threshold voltage.

13. The apparatus according to claim 9 wherein the transistors of different types differ by an amount of current they drive.

14. The apparatus according to claim 9 whereas the monitoring circuitry is adapted to apply a first policy for increasing the voltage level and clock signal frequency and to apply a second policy for decreasing the voltage level and clock signal frequency.

15. The apparatus according to claim 9 further adapted to control a supply source and a clock signal source.

16. The apparatus according to claim 9 , wherein at least one reference circuit comprises transistors of a certain type that are arranged to form a ring oscillator, wherein various stages of the ring oscillator are coupled by long interconnects.

17. The apparatus according to claim 9 , wherein each of the multiple reference circuits comprises a ring oscillator and a counter for counting an amount of oscillations of the ring oscillator.

18. The apparatus according to claim 17 , wherein the counter is coupled to a minimal threshold comparator and to a range comparator that are arranged to compare a value of the counter to a minimal threshold and to at least one range threshold, to provide a result, and to send a request related to a voltage level and a frequency of a clock signal in response to the result.

19. The method according to claim 1 further comprising:

receiving, at a lookup table register, a minimal threshold value for an expected parameter of the at least one of the multiple reference circuits.

20. The apparatus according to claim 9 , further comprising:

a lookup table register coupled to the monitoring circuitry, the lookup table register to receive a minimal threshold value for an expected parameter of the at least one of the multiple reference circuits.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0655 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Nov 1, 2007
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 020045/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2007
From: ROZEN, ANTON; PRIEL, MICHAEL; KUZMIN, DAN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 019276/0005 →